參數(shù)資料
型號: ISP1761BE,518
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 145/164頁
文件大?。?/td> 767K
代理商: ISP1761BE,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
80 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
41 to 35
Device
Address[6:0]
SW — writes
-
Device Address: This is the USB address of the function
containing the endpoint that is referred to by this buffer.
34 to 32
EndPt[3:1]
SW — writes
-
Endpoint: This is the USB address of the endpoint within the
function.
DW0
31
EndPt[0]
SW — writes
-
Endpoint: This is the USB address of the endpoint within the
function.
30 to 29
reserved
-
28 to 18
TT_MPS_Len
[10:0]
SW — writes
-
Transaction Translator Maximum Packet Size Length: This
eld indicates the maximum number of bytes that can be sent
per start split depending on the number of total bytes needed. If
the total bytes to be sent for the entire millisecond is greater
than 188 bytes, this eld should be set to 188 bytes for an OUT
token and 192 bytes for an IN token. Otherwise, this eld
should be equal to the total bytes sent.
17 to 3
NrBytesTo
Transfer[14:0]
SW — writes
-
Number of Bytes to Transfer: This eld indicates the number
of bytes that can be transferred by this data structure. It is used
to indicate the depth of the DATA eld. This eld is restricted to
1023 bytes because in siTD the maximum allowable payload for
a full-speed device is 1023 bytes. This eld indirectly becomes
the maximum packet size of the downstream device.
2 to 1
reserved
-
0V
SW — sets
HW — resets
-
0 — This bit is deactivated when the entire PTD is executed, or
when a fatal error is encountered.
1 — Software updates to one when there is payload to be sent
or received. The current PTD is active.
Table 74.
Start and complete split for isochronous: bit description …continued
Bit
Symbol
Access
Value
Description
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