參數資料
型號： ISP1761BE,518
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數： 101/164頁
文件大?。?/td> 767K
代理商： ISP1761BE,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
40 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
[1]
For details on register bit description, refer to Ref. 2 “Enhanced Host Controller Interface Specication for
[2]
These elds read logic 0, if the PP (Port Power) bit in register PORTSC 1 is logic 0.
8.2.7 ISO PTD Done Map register
The bit description of the register is given in Table 25.
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reect the updated status of new executed PTDs.
Table 24.
PORTSC1 - Port Status and Control 1 register (address 0064h) bit description
Bit
Symbol
Description[1]
31 to 20
-
reserved
19 to 16
PTC[3:0] Port Test Control: When this eld is zero, the port is not operating in test
mode. A non-zero value indicates that it is operating in test mode indicated
by the value.
15 to 14
PIC[1:0]
Port Indicator Control: Writing to this eld has no effect if the
P_INDICATOR bit in the HCSPARAMS register is logic 0.
For a description on how these bits are implemented, refer to Ref. 1
13
PO
Port Owner: This bit unconditionally goes to logic 0 when the congured
bit in the CONFIGFLAG register makes a logic 0 to logic 1 transition. This
bit unconditionally goes to logic 1 whenever the congured bit is logic 0.
12
PP
Port Power: The function of this bit depends on the value of the PPC (Port
Power Control) eld in the HCSPARAMS register.
11 to 10
LS[1:0]
Line Status: This eld reects the current logical levels of the DP (bit 11)
and DM (bit 10) signal lines.
9
-
reserved
8PR
Port Reset: Logic 1 means the port is in the reset state. Logic 0 means the
port is not in reset.[2]
7
SUSP
Suspend: Logic 1 means the port is in the suspend state. Logic 0 means
the port is not suspended.[2]
6
FPR
Force Port Resume: Logic 1 means resume detected or driven on the
port. Logic 0 means no resume (K-state) detected or driven on the port.[2]
5 to 3
-
reserved
2
PED
Port Enabled/Disabled: Logic 1 means enable. Logic 0 means disable.[2]
1
ECSC
Connect Status Change: Logic 1 means change in ECCS. Logic 0 means
no change.[2]
0
ECCS
Current Connect Status: Logic 1 indicates a peripheral is present on the
port. Logic 0 indicates no peripheral is present.[2]
Table 25.
ISO PTD Done Map register (address 0130h) bit description
Bit
Symbol
Access
Value
Description
31 to 0
ISO_PTD_DONE
_
MAP[31:0]
R
0000 0000h
ISO PTD Done Map: Done map for each of the 32 PTDs for the ISO
transfer
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