參數(shù)資料
型號: ISP1362BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 35/150頁
文件大小: 647K
代理商: ISP1362BD
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
35 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6. The A-device detects lack of bus activity for more than 3 ms and turns off its
DP pull-up. Alternatively, if the A-device has no further need to communicate with
the B-device, the A-device may turn off V
BUS
and end the session.
7. The B-device turns on its pull-up.
8. After waiting 30
μ
s to ensure that the DP line is not HIGH because of the residual
effect of the A-device pull-up, the A-device notices that the DP-line is HIGH (and
the DM line is LOW) indicating that the B-device is signaling a connect and is
ready to respond as a peripheral. At this point, the A-device becomes a host and
asserts the bus reset to start using the bus.
11.4.2
OTG state diagrams
Figure 18
and
Figure 19
show the state diagrams for the dual-role A-device and the
dual-role B-device, respectively. For a detailed explanation, refer to
On-The-Go
Supplement to the USB 2.0 Speci
fi
cation Rev. 1.0a
.
The OTG state machine is implemented with software. The inputs to the state
machine come from four sources: hardware signals from the USB bus, software
signals from the application program, internal variables with the state machines and
timers:
Hardware inputs: Include id, a_vbus_vld, a_sess_vld, b_sess_vld, b_sess_end,
a_conn, b_conn, a_bus_suspend, b_bus_suspend, a_bus_resume,
b_bus_resume, a_srp_det and b_se0_srp. All these inputs can be derived from
the OtgInterrupt and OtgStatus registers.
Software inputs: Include a_bus_req, a_bus_drop and b_bus_req.
Internal variables: Include a_set_b_hnp_en, b_hnp_enable and b_srp_done.
Timers: The HNP state machine uses four timers: a_wait_vrise_tmr,
a_wait_bcon_tmr, a_aidl_bdis_tmr and b_ase0_brst, tmr. All timers are started on
entry to and reset on exit from their associated states. The ISP1362 provides a
programmable timer that can be used as any of these four timers.
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