參數(shù)資料
型號(hào): ISP1183BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Low-power Universal Serial Bus interface device with DMA
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
封裝: 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32
文件頁(yè)數(shù): 16/62頁(yè)
文件大?。?/td> 295K
代理商: ISP1183BS
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
16 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.3 Endpoint initialization
In response to the standard USB request Set Interface, the firmware must program all
16 ECRs of the ISP1183 in sequence (see
Table 4
), whether the endpoints are
enabled or not. The hardware will then automatically allocate FIFO storage space.
If all endpoints have been successfully configured, the firmware must return an empty
packet to the control IN endpoint to acknowledge success to the host. If there are
errors in the endpoint configuration, the firmware must stall the control IN endpoint.
When reset by hardware or through the USB bus, the ISP1183 disables all endpoints
and clears all ECRs, except for the control endpoint, which is fixed and always
enabled.
Endpoint initialization can be done at any time. It is, however, valid only after
enumeration.
10.4 Endpoint I/O mode access
When an endpoint event occurs (a packet is transmitted or received), the associated
endpoint interrupt bits (EPn) of the Interrupt register (IR) are set by the SIE. The
firmware then responds to the interrupt and selects the endpoint for processing.
The endpoint interrupt bit is cleared when the Endpoint Status register (ESR) is read.
The ESR also contains information on the status of the endpoint buffer.
For an OUT (= receive) endpoint, the packet length and the packet data can be read
from the ISP1183 by using the Read Buffer command. When the whole packet is
read, the firmware sends a Clear Buffer command to enable the reception of new
packets.
For an IN (= transmit) endpoint, the packet length and data to be sent can be written
to the ISP1183 by using the Write Buffer command. When the whole packet is written
to the buffer, the firmware sends a Validate Buffer command to enable data
transmission to the host.
10.5 Special actions on control endpoints
Control endpoints require special firmware actions. The arrival of a SETUP packet
flushes the IN buffer and disables the Validate Buffer and Clear Buffer commands for
the control IN and OUT endpoints. The microcontroller needs to re-enable these
commands by sending an Acknowledge Setup command to
both
control endpoints.
This ensures that the last SETUP packet stays in the buffer and that no packets can
be sent back to the host until the microcontroller has explicitly acknowledged that it
has seen the SETUP packet.
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