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參數(shù)資料
| 型號： | ISP1181DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | INDUCTOR 4.7NH +-.3NH 0402 SMD |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, TSSOP-48 |
| 文件頁數(shù)： | 41/69頁 |
| 文件大?。?/td> | 1655K |
| 代理商： | ISP1181DGG |
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Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
41 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
13. Interrupts
Figure 10
shows the interrupt logic of the ISP1181. Each of the indicated USB events
is logged in a status bit of the Interrupt Register. Corresponding bits in the Interrupt
Enable Register determine whether or not an event will generate an interrupt.
Interrupts can be masked globally by means of the INTENA bit of the Mode Register
(see
Table 21
).
The active level and signalling mode of the INT output is controlled by the INTPOL
and INTLVL bits of the Hardware Configuration Register (see
Table 23
). Default
settings after reset are active LOW and level mode. When pulse mode is selected, a
pulse of 83 ns is generated when the OR-ed combination of all interrupt bits changes
from logic 0 to logic 1.
Bits RESET, RESUME, EOT and SOF are cleared upon reading the Interrupt
Register. The endpoint bits (EP0OUT to EP14) are cleared by reading the associated
Endpoint Status Register.
Bit BUSTATUS follows the USB bus status exactly, allowing the firmware to get the
current bus status when reading the Interrupt Register.
SETUP and OUT token interrupts are generated after ISP1181 has acknowledged
the associated data packet. In bulk transfer mode, the ISP1181 will issue interrupts
for every ACK received for an OUT token or transmitted for an IN token.
Fig 10. Interrupt logic.
handbook, full pagewidth
MGS772
RESET
SUSPND
RESUME
SOF
EP14
...
EP0IN
.
.
.
.
EP0OUT
EOT
IERST
interrupt register
interrupt enable
register
IESUSP
IERESM
IESOF
IEP14
...
IEP0IN
IEP0OUT
IEEOT
device mode
register
INTENA
INTLVL
hardware configuration
register
INTPOL
PULSE
GENERATOR
INT
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
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| ISP1183 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-power Universal Serial Bus interface device with DMA |
| ISP1183BS | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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