參數(shù)資料
型號(hào)： ISP1181DGG
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： INDUCTOR 4.7NH +-.3NH 0402 SMD
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PDSO48
封裝： 6.10 MM, PLASTIC, TSSOP-48
文件頁數(shù)： 11/69頁
文件大?。?/td> 1655K
代理商： ISP1181DGG
Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
11 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
9.2 Endpoint FIFO size
The size of the FIFO determines the maximum packet size that the hardware can
support for a given endpoint. Only enabled endpoints are allocated space in the
shared FIFO storage, disabled endpoints have zero bytes.
Table 5
lists the
programmable FIFO sizes.
The following bits in the Endpoint Configuration Register (ECR) affect FIFO
allocation:
endpoint enable bit (FIFOEN)
size bits of an enabled endpoint (FFOSZ[3:0])
isochronous bit of an enabled endpoint (FFOISO).
Remark:
Register changes that affect the allocation of the shared FIFO storage
among endpoints must
not
be made while valid data is present in any FIFO of the
enabled endpoints. Such changes will render
all
FIFO contents
undefined
.
Each programmable FIFO can be configured independently via its ECR, but the total
physical size of all enabled endpoints (IN plus OUT) must not exceed 2462 bytes
(512 bytes for non-isochronous FIFOs).
Table 6
shows an example of a configuration fitting in the maximum available space of
2462 bytes. The total number of logical bytes in the example is 1311. The physical
storage capacity used for double buffering is managed by the device hardware and is
transparent to the user.
Table 5:
FFOSZ[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
Programmable FIFO size
Non-isochronous
8 bytes
16 bytes
32 bytes
64 bytes
reserved
reserved
reserved
reserved
interrupt IN 8 bytes,
rate feedback mode
interrupt IN 16 bytes,
rate feedback mode
interrupt IN 32 bytes,
rate feedback mode
interrupt IN 64 bytes,
rate feedback mode
reserved
reserved
reserved
reserved
Isochronous
16 bytes
32 bytes
48 bytes
64 bytes
96 bytes
128 bytes
160 bytes
192 bytes
256 bytes
1001
320 bytes
1010
384 bytes
1011
512 bytes
1100
1101
1110
1111
640 bytes
768 bytes
896 bytes
1023 bytes
相關(guān)PDF資料
PDF描述
ISP1183 Low-power Universal Serial Bus interface device with DMA
ISP1183BS Low-power Universal Serial Bus interface device with DMA
ISP1301 Universal Serial Bus On-The-Go transceiver
ISP1301BS Universal Serial Bus On-The-Go transceiver
ISP1362 Single-chip Universal Serial Bus On-The-Go controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1183 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-power Universal Serial Bus interface device with DMA
ISP1183BS 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
ISP1183BS,118 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,151 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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