參數(shù)資料
型號： ISP1161ABD
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù)： 97/134頁
文件大小： 587K
代理商： ISP1161ABD
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
97 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13.1.6
DcDMAConfiguration register (R/W: F1H/F0H)
This command defines the DMA configuration of ISP1161A’s DC and
enables/disables DMA transfers. The command accesses the DcDMAConfiguration
register, which consists of 2 bytes. The bit allocation is given in
Table 86
. A bus reset
will clear bit DMAEN (DMA disabled), all other bits remain unchanged.
Code (Hex): F0/F1 —
write/read DMA Configuration
Transaction —
write/read 1 word
[1]
Unchanged by a bus reset.
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
15
IEP6
0
R/W
7
reserved
0
R/W
14
IEP5
0
R/W
6
13
IEP4
0
R/W
5
IEPSOF
0
R/W
12
IEP3
0
R/W
4
IESOF
0
R/W
11
IEP2
0
R/W
3
IEEOT
0
R/W
10
IEP1
0
R/W
2
IESUSP
0
R/W
9
8
IEP0IN
0
R/W
1
IERESM
0
R/W
IEP0OUT
0
R/W
0
IERST
0
R/W
SP_IEEOT
0
R/W
Table 85:
Bit
31 to 24
23 to 10
9
8
7
6
5
4
3
2
1
0
DcInterruptEnable register: bit description
Symbol
Description
-
reserved; must write logic 0
IEP14 to IEP1
Logic 1 enables interrupts from the indicated endpoint.
IEP0IN
Logic 1 enables interrupts from the control IN endpoint.
IEP0OUT
Logic 1 enables interrupts from the control OUT endpoint.
-
reserved
SP_IEEOT
Logic 1 enables interrupt upon detection of a short packet.
IEPSOF
Logic 1 enables 1 ms interrupts upon detection of Pseudo SOF.
IESOF
Logic 1 enables interrupt upon SOF detection.
IEEOT
Logic 1 enables interrupt upon EOT detection.
IESUSP
Logic 1 enables interrupt upon detection of ‘suspend’ state.
IERESM
Logic 1 enables interrupt upon detection of a ‘resume’ state.
IERST
Logic 1 enables interrupt upon detection of a bus reset.
Table 86:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
DcDMAConfiguration register: bit allocation
15
14
CNTREN
SHORTP
0
[1]
0
[1]
R/W
R/W
7
6
13
12
11
10
9
8
reserved
0
[1]
R/W
5
reserved
0
[1]
R/W
4
reserved
0
[1]
R/W
3
DMAEN
0
R/W
reserved
0
[1]
R/W
2
reserved
0
R/W
reserved
0
[1]
R/W
1
reserved
0
[1]
R/W
0
EPDIX[3:0]
0
[1]
R/W
BURSTL[1:0]
0
[1]
R/W
0
[1]
R/W
0
[1]
R/W
0
[1]
R/W
0
[1]
R/W
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161ABD,118 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,151 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD-S 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161ABD-T 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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