參數(shù)資料
型號: ISL6530EVAL1
廠商: Intersil Corporation
英文描述: Dual Low-Noise High-Drive Operational Amplifier 8-PDIP 0 to 70
中文描述: 雙同步降壓5V的脈寬調(diào)制(PWM)控制器,用于數(shù)據(jù)存儲器內(nèi)存VDDQ和VTT終端
文件頁數(shù): 10/17頁
文件大?。?/td> 540K
代理商: ISL6530EVAL1
10
FN9052.2
November 15, 2004
r
DS(ON)
variations. To avoid over-current tripping in the
normal operating load range, find the R
OCSET
resistor from
the equation above with:
1. The maximum r
DS(ON)
at the highest junction temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for
where
I is the output inductor ripple current.
,
For an equation for the ripple current see the section under
component guidelines titled
Output Inductor Selection
.
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across
R
OCSET
in the
presence of switching noise on the input voltage.
Current Sinking
The ISL6530 V
TT
regulator incorporates a MOSFET shoot-
through protection method which allows the converter to sink
current as well as source current. Care should be exercised
when designing a converter with the ISL6530 when it is
known that the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating its input voltage. This
means that the converter is boosting current into the input
rail of the regulator. If there is nowhere for this current to go,
such as to other distributed loads on the rail or through a
voltage limiting protection device, the capacitance on this rail
will absorb the current. This situation will allow the voltage
level of the input rail to increase. If the voltage level of the rail
is boosted to a level that exceeds the maximum voltage
rating of any components attached to the input rail, then
those components may experience an irreversible failure or
experience stress that may shorten their lifespan. Ensuring
that there is a path for the current to flow other than the
capacitance on the rail will prevent this failure mode.
To insure that the current does not boost up the input rail
voltage of the V
TT
regulator, it is recommended that the
input rail of the V
TT
regulator be the output of the V
DDQ
regulator. The current being sunk by the V
TT
regulator will
be fed into the V
DDQ
rail and then drawn into the DDR
SDRAM memory module and back into the V
TT
regulator.
Figure 6 shows the recommended configuration and the
resulting current loop.
Application Guidelines
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching efficiently at
300kHz, the resulting current transitions from one device to
another cause voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
layout and printed circuit board design minimizes the voltage
spikes in the converters.
As an example, consider the turn-off transition of the PWM
MOSFET. Prior to turn-off, the MOSFET is carrying the full
load current. During turn-off, current stops flowing in the
MOSFET and is picked up by the lower MOSFET. Any
parasitic inductance in the switched current path generates a
large voltage spike during the switching interval. Careful
component selection, tight layout of the critical components,
and short, wide traces minimizes the magnitude of voltage
spikes.
There are two sets of critical components in a DC-DC
converter using the ISL6530. The switching components are
the most critical because they switch large amounts of
energy, and therefore tend to generate large amounts of
noise. Next are the small signal components which connect
to sensitive nodes or supply critical bypass current and
signal coupling.
A multi-layer printed circuit board is recommended. Figure 7
shows the connections of the critical components in the
converter. Note that capacitors C
IN
and C
OUT
could each
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
I
PEAK
I
OUT MAX
(
)
I
2
(
----------
)
+
>
FIGURE 6. V
TT
CURRENT SINKING LOOP
DDR
SDRAM
+5V
R
T
+
V
REF
UGATE1
PHASE1
LGATE1
UGATE2
PHASE2
LGATE2
ISL6530
V
DDQ
V
TT
ISL6530
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ISL6530EVAL2 功能描述:EVALUATION BOARD 2 ISL6530 RoHS:否 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC(離線)SMPS 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC,步升 輸出及類型:1,非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969
ISL6531CB 功能描述:電壓模式 PWM 控制器 Synch Buck - DDRAM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel
ISL6531CB-T 功能描述:IC CONTROLLER INTEL 24SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源,ICERA E400,E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA,WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
ISL6531CBZ 功能描述:IC CONTROLLER INTEL 24SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源,ICERA E400,E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA,WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
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