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參數(shù)資料
| 型號(hào)： | IRU3073CQTR |
| 廠商： | International Rectifier |
| 文件頁(yè)數(shù)： | 3/21頁(yè) |
| 文件大?。?/td> | 236K |
| 描述： | IC REG DL BCK/LINEAR 16-QSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 拓?fù)洌?/td> | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開(kāi)關(guān)： | 210kHz ~ 400kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 0.8 V ~ 22.5 V，65mA |
| 帶 LED 驅(qū)動(dòng)器： | 無(wú) |
| 帶監(jiān)控器： | 無(wú) |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 4.4 V ~ 25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | *IRU3073CQTR IRU3073CQCT |
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IRU3073
3
Rev. 1.0
09/17/03
www.irf.com
PARAMETER
SYM TEST CONDITION MIN TYP MAX UNITS
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
VP Voltage Range
Transconductance
Oscillator
Frequency
Ramp Amplitude
Output Drivers
Rise Time
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
LDO Controller Section
Drive Current
Fb Voltage
Input Bias Current
Thermal Shutdown
Current Limit
OC Threshold Set Current
OC Comp Off-Set Voltage
SS=3V
SS=0V
Note 1
Rt=100K
Rt=50K
Note 1
CLOAD=1500pF
CLOAD=1500pF
Fb=0.7V, Freq=200KHz
Fb=0.9V
Note 1
-5
35
0.8
180
340
85
0
40
0.784
-1
20
-5
-0.1
55
700
210
400
1.25
50
50
100
90
65
0.8
-0.1
150
30
0
mA
mA
V
mmho
KHz
VPP
ns
ns
ns
%
%
mA
V
mA
8C
mA
mV
+5
75
1.5
240
460
100
100
0.816
+1
40
+5
PIN DESCRIPTIONS
Note 1: Guaranteed by design but not tested in production.
IFB1
IFB2
VP
Freq
VRAMP
Tr
Tf
TDB
DMAX
DMIN
Drv1
IOCSET
VOC(OFFSET)
These pins provide feedback for the linear regulator controllers.
Outputs of the linear regulator controllers.
A resistor should be connected from this pin to ground for setting the switching frequency.
This pin provides soft-start for the switching regulator. An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin down below 0.4V.
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
Non-inverting input of error amplifier.
Reference voltage.
This pin provides biasing for the internal blocks of the IC as well as powers the LDO
controller. A minimum of 1mF, high frequency capacitor must be connected from this pin
to ground to provide peak drive current capability.
This pin powers the low side output driver and can be connected either to Vcc or separate
supply. A minimum of 1mF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
Output driver for the synchronous power MOSFET.
PIN# PIN SYMBOL PIN DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
Fb2
Drv2
Rt
SS / SD
Comp
Fb1
VP1
VREF
Vcc
VcL
LDrv
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