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參數(shù)資料
| 型號： | IRU3073CQTR |
| 廠商： | International Rectifier |
| 文件頁數(shù)： | 10/21頁 |
| 文件大?。?/td> | 236K |
| 描述： | IC REG DL BCK/LINEAR 16-QSOP |
| 標準包裝： | 1 |
| 拓撲： | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 210kHz ~ 400kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 0.8 V ~ 22.5 V，65mA |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 4.4 V ~ 25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | * |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | *IRU3073CQTR IRU3073CQCT |
10
Rev. 1.0
09/17/03
IRU3073
www.irf.com
FESR = ---(14)
1
2p3ESR3Co
PSW(TOTAL) = 133mW
FLC = ---(13)
1
2p3 LO3CO
RDS(ON) = 4mV31.5 = 6mV
ISET E IO(LIM) = 8A31.5 = 12A
(50% over nominal output current)
This results to: RSET E 4.8KV
Select: RSET = 5KV
VDS
VGS
10%
90%
td(ON)
td(OFF)
tr
tf
Figure 9 - Switching time waveforms.
From IRF7832 data sheet we obtain:
These values are taken under a certain condition test.
For more details please refer to the IRF7832 datasheet.
By using equation (12), we can calculate the total switch-
ing losses.
Programming the Over-Current Limit
The over-current threshold can be set by connecting a
resistor (RSET) from drain of low side MOSFET to the
OCSet pin. The resistor can be calculated by using equa-
tion (2).
The RDS(ON) has a positive temperature coefficient and it
should be considered for the worse case operation.
Feedback Compensation
The IRU3073 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 458).
Gain
FLC
0dB
Phase
08
FLC
-1808
Frequency
Frequency
-40dB/decade
The output LC filter introduces a double pole, 40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 1808 (see Figure 10). The Reso-
nant frequency of the LC filter is expressed as follows:
Figure 10 shows gain and phase of the LC filter. Since
we already have 1808 phase shift just from the output
filter, the system risks being unstable.
Figure 10 - Gain and phase of LC filter.
The IRU3073s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 11.
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general, the output capacitors ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
The ESR zero of the output capacitor expressed as fol-
lows:
IRF7832
tr = 12.3ns
tf = 21ns
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