參數(shù)資料
型號： IRF3808STRR
英文描述： TRANSISTOR | MOSFET | N-CHANNEL | 75V V(BR)DSS | 106A I(D) | TO-263AB
中文描述： 晶體管| MOSFET的| N溝道| 75V的五（巴西）直| 106A章一（d）|對263AB
文件頁數(shù)： 2/11頁
文件大小： 161K
代理商： IRF3808STRR
IRF3808S/IRF3808L
2
www.irf.com
Parameter
Min. Typ. Max. Units
75
–––
–––
0.086
–––
–––
5.9
2.0
–––
100
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
150
–––
31
–––
50
–––
16
–––
140
–––
68
–––
120
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25
°
C, I
D
= 1mA
V
GS
= 10V, I
D
= 82A
V
DS
= 10V, I
D
= 250μA
V
DS
= 25V, I
D
= 82A
V
DS
= 75V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 150
°
C
V
GS
= 20V
V
GS
= -20V
I
D
= 82A
V
DS
= 60V
V
GS
= 10V
V
DD
= 38V
I
D
= 82A
R
G
= 2.5
V
GS
= 10V
Between lead,
6mm (0.25in.)
from package
and center of die contact
V
GS
= 0V
V
DS
= 25V
= 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 1.0V,
= 1.0MHz
V
GS
= 0V, V
DS
= 60V,
= 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
V
(BR)DSS
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
g
fs
Forward Transconductance
Drain-to-Source Breakdown Voltage
–––
V
V/
°
C
m
V
S
7.0
4.0
–––
20
250
200
-200
220
47
76
–––
–––
–––
–––
μA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
nA
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
nC
–––
–––
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Source-Drain Ratings and Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
5310
–––
890
130
6010
–––
570
1140
–––
–––
–––
pF
–––
nH
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
L
D
Internal Drain Inductance
L
S
Internal Source Inductance
–––
–––
S
D
G
I
GSS
ns
4.5
7.5
I
DSS
Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting T
J
= 25
°
C, L = 0.130mH
R
G
= 25
, I
AS
= 82A. (See Figure 12).
I
SD
≤
82A, di/dt
≤
310A/μs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175
°
C
Pulse width
≤
400μs; duty cycle
≤
2%.
Notes:
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25
°
C, I
S
= 82A, V
GS
= 0V
T
J
= 25
°
C, I
F
= 82A
di/dt = 100A/μs
–––
–––
I
SM
–––
–––
V
SD
t
rr
Q
rr
t
on
–––
–––
–––
–––
93
340
1.3
140
510
V
ns
nC
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
106
550
A
C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to
application note #AN-994.
相關(guān)PDF資料
PDF描述
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