
E
16.0
iMC002/004/010/020FLSA
25
PRELIMINARY
DEVICE STATUS REGISTER
Each 28F008SA device in the Series 2 Card
contains a status register which displays the
condition of its WSM. The status register is read at
any time by writing the Read Status command to
the CUI. After writing this command, all subsequent
Read operations output data from the status
register, until another command is written to the
CUI.
Bit 7
—WSM Status
This bit reflects the Ready/Busy condition of the
WSM. A
“1” indicates that read, block-erase or
data- write operations are available. A “0” indicates
that write or erase operations are in progress.
Bit 6
—Erase Suspend Status
If an Erase Suspend command is issued during the
erase operation, the WSM halts execution and sets
the WSM Status bit and the erase suspend status
bit to a
“1.” This bit remains set until the device
receives an Erase Resume command, at which
point the CUI resets the WSM Status bit and the
erase suspend status bit.
Bit 5
—Erase Status
This bit will be cleared to 0 to indicate a successful
block-erasure. When set to a
“1”, the WSM has
been unsuccessful at performing an erase
verification. The device’s CUI only resets this bit to
a “0” in response to a Clear Status Register
command.
Bit 4
—Write Status
This bit will be cleared to a 0 to indicate a
successful data-write operation. When the WSM
fails to write data after receiving a write command,
the bit is set to a
“1” and can only be reset by the
CUI in response to a Clear Status Register
command.
Bit 3
—V
PP
Status
During block-erase and data-write operations, the
WSM monitors the output of the device’s internal
V
PP
detector. In the event of low V
PP
, the WSM sets
(“1”) the V
PP
status bit, the status bit for the
operation in progress (either write or erase). The
CUI resets these bits in response to a Clear Status
Register command. Also, the WSM RY/BY# bit will
be set to indicate a device ready condition. This bit
MUST be reset by system software (Clear Status
Register command) before further data writes or
block erases are attempted.
Device Status Register (Read Only Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WSM
Status
Erase
Suspend
Status
Erase
Status
Write
Status
V
PP
Status
Reserved