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參數(shù)資料
| 型號： | IL4J-67204V-55 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | FIFO |
| 英文描述： | 4K X 9 OTHER FIFO, 55 ns, QCC32 |
| 封裝： | LCC-32 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 145K |
| 代理商： | IL4J-67204V-55 |
L 67203/L 67204
MATRA MHS
Rev. C (10/11/94)
10
AC Test Conditions
Input pulse levels
: Gnd to 3.0 V
Input rise/Fall times
: 5 ns
Input timing reference levels
: 1.5 V
Output reference levels
: 1.5 V
Output load
: See figure 7
Figure 7. Output Load.
TO
OUTPUT
PIN
333
30 pF*
500
5 V
* includes jig and scope capacitance
or equivalent circuit
SYMBOL
(16)
SYMBOL
(17)
PARAMETER (18) (22)
L 67203/204
– 55
L 67203/204
– 60
L 67203/204
– 65
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
READ CYCLE
TRLRL
tRC
Read cycle time
70
–
75
–
80
–
ns
TRLQV
tA
Access time
–
55
–
60
–
65
ns
TRHRL
tRR
Read recovery time
15
–
15
–
15
–
ns
TRLRH
tRPW
Read pulse width (19)
55
–
60
–
65
–
ns
TRLQX
tRLZ
Read low to data low Z (20)
10
–
10
–
ns
TWHQX
tWLZ
Write low to data low Z (20, 21)
15
–
15
–
ns
TRHQX
tDV
Data valid from read high
5
–
5
–
5
–
ns
TRHQZ
tRHZ
Read high to data high Z (20)
–
30
–
30
ns
WRITE CYCLE
TWLWL
tWC
Write cycle time
70
–
75
–
80
–
ns
TWLWH
tWPW
Write pulse width (19)
55
–
60
–
65
–
ns
TWHWL
tWR
Write recovery time
15
–
15
–
15
–
ns
TDVWH
tDS
Data set-up time
30
–
30
–
30
–
ns
TWHDX
tDH
Data hold time
0
–
5
–
10
–
ns
RESET CYCLE
TRSLWL
tRSC
Reset cycle time
70
–
75
–
80
–
ns
TRSLRSH
tRS
Reset pulse width (19)
55
–
60
–
65
–
ns
TWHRSH
tRSS
Reset set-up time
55
–
60
–
65
–
ns
TRSHWL
tRSR
Reset recovery time
15
–
15
–
15
–
ns
RETRANSMIT CYCLE
TRTLWL
tRTC
Retransmit cycle time
70
–
75
–
80
–
ns
TRTLRTH
tRT
Retransmit pulse width (19)
55
–
60
–
65
–
ns
TWHRTH
tRTS
Retransmit set-up time (20)
55
–
60
–
65
–
ns
TRTHWL
tRTR
Retransmit recovery time
15
–
15
–
15
–
ns
FLAGS
TRSLEFL
tEFL
Reset to EF low
–
65
–
75
–
75
ns
TRSLFFH
tHFH, tFFH
Reset to HF/FF high
–
65
–
75
–
75
ns
TRLEFL
tREF
Read low to EF low
–
50
–
55
–
60
ns
TRHFFH
tRFF
Read high to FF high
–
50
–
55
–
60
ns
TEFHRH
tRPE
Read width after EF high
55
–
60
–
65
–
ns
TWHEFH
tWEF
Write high to EF high
–
50
–
55
–
60
ns
TWLFFL
tWFF
Write low to FF low
–
50
–
55
–
60
ns
TWLHFL
tWHF
Write low to HF low
–
65
–
75
–
75
ns
TRHHFH
tRHF
Read high to HF high
–
65
–
75
–
75
ns
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