參數(shù)資料
型號: IL4J-67204V-55
廠商: TEMIC SEMICONDUCTORS
元件分類: FIFO
英文描述: 4K X 9 OTHER FIFO, 55 ns, QCC32
封裝: LCC-32
文件頁數(shù): 12/16頁
文件大小: 145K
代理商: IL4J-67204V-55
L 67203/L 67204
MATRA MHS
Rev. C (10/11/94)
5
Functional Description
Operating Modes
Single Device Mode
A single L 67203/204 may be used when the application
requirements are for 2048/4096 words or less. The
L 67203/204 is in a Single Device Configuration when
the Expansion In (XI) control input is grounded (see
Figure 2). In this mode the Half-Full Flag (HF), which is
an active low output, is shared with Expansion Out (XO).
Figure 2. Block Diagram of Single 2K
× 9 and 4K × 9 FIFO.
(HALF–FULL FLAG)
WRITE
(W)(R)
READ
DATAIN
9
(I)
DATAOUT
9
Q
FULL FLAG
RESET
(FF)
(RS)
EMPTY FLAG
RETRANSMIT
(EF)
(RT)
EXPANSION IN (XI)
HF
L
67203/204
Width Expansion Mode
Word width may be increased simply by connecting the
corresponding input control signals of multiple devices.
Status flags (EF, FF and HF) can be detected from any
device. Figure 3 demonstrates an 18-bit word width by
using two L 67203/204. Any word width can be attained
by adding additional L 67203/204.
Figure 3. Block Diagram of 2048 / 4096
× 18 FIFO Memory Used in Width Expansion Mode.
L
67203/204
XI
L
67203/204
XI
(W)
WRITE
(FF)
FULL FLAG
RESET
(R) READ
(EF) EMPTY FLAG
(RT) RETRANSMIT
HF
9
18
(RS)
9
18
9
DATAIN (I)
9
HF
(Q) DATAOUT
Note :
3. Flag detection is accomplished by monitoring the FF, EF and the HF signals on either (any) device used in the width
expansion configuration. Do not connect any output control signals together.
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