![](http://datasheet.mmic.net.cn/100000/IF180C52TXXX-20R_datasheet_3493957/IF180C52TXXX-20R_655.png)
655
32099I–01/2012
AT32UC3L016/32/64
9, 3, 4, 5, 6, 7, 8, 9, 3, 4, etc. MAXDEV must not exceed the value of (2(DIV+1)), or undefined
behavior will occur.
28.6.7
Synchronization
To prevent interference from the 50 or 60Hz mains line the CAT can trigger acquisition on the
SYNC signal. The SYNC signal should be derived from the mains line. The acquisition will trig-
ger on a falling edge of this signal. To enable synchronization for a specific acquisition type, the
user must write a one to the SYNC bit in the appropriate Configuration Register 1 (MGCFG1,
ATCFG1, TGACFG1, or TGBCFG1).
For QMatrix acquisition, all X lines must be sampled at a specific phase of the noise signal for
the synchronization to be effective. This can be accomplished by the synchronization timer,
which is enabled by writing a non-zero value to the SYNCTIM field in the MGCFG2 register. This
ensures that the start of the acquisition of each X line is spaced at regular intervals, defined by
the SYNCTIM field.
28.6.8
Resistive Drive
By default, the CAT pins are driven with normal I/O drive properties. Some of the CSA and CSB
pins can optionally drive with a 1k output resistance for improved EMC. The pins that have this
capability are listed in the Module Configuration section.
28.6.9
Discharge Current Sources
The device integrates discharge current sources, which can be used to discharge the sampling
capacitors during the QMatrix measurement phase. The discharge current sources are enabled
by writing the GLEN bit in the Discharge Current Source (DICS) register to one. This enables an
internal reference voltage, which can be either the internal 1.1V band gap voltage or VDDIO/3,
as selected by the INTVREFSEL bit in the DICS register. If the DICS.INTREFSEL bit is one, the
reference voltage is applied across an internal reference resistor, R
int. Otherwise, the voltage is
applied to the DIS pin, and an external reference resistor must be connected between DIS and
ground. The nominal discharge current is given by the following formula, where V
ref is the refer-
ence voltage, R
ref is the value of the reference resistor, trim is the value written to the
DICS.TRIM field, and k is a constant of proportionality:
I = (V
ref/Rref)*(1+(k*trim))
The values for the internal reference resistor, R
int, and the constant, k, may be found in the Elec-
trical Characteristics section. The nominal discharge current may be programmed between 2
and 20A. The reference current can be fine-tuned by adjusting the trim value in the DICS.TRIM
field.
The reference current is mirrored to each Y-pin if the corresponding bit is written to one in the
DICS.SOURCES field.
28.6.10
Voltage Divider Enable (VDIVEN) Capability
In many QMatrix applications, the sense capacitors will be charged to 50 mV or more and the
negative reference pin (ACREFN) of the analog comparators can be tied directly to ground. In
that case, the relatively small input offset voltage of the comparators will not cause acquisition
problems. However, in certain specialized QMatrix applications such as interpolated touch
screens, it may be desirable for the sense capacitors to be charged to less than 25 mV. When
such small voltages are used on the sense capacitors, the input offset voltage of the compara-
tors becomes an issue and can cause QMatrix acquisition problems.