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參數(shù)資料
型號： IDT82P2916BFG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 124/138頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 16CH SH 484BGA
標(biāo)準(zhǔn)包裝： 84
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 16
電源電壓： 1.8V, 3.3V
功率（瓦特）： 3.10W
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-LFBGA
供應(yīng)商設(shè)備封裝： 484-CABGA（19x19）
包裝： 托盤
包括： AIS 警報檢測器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測器，遠(yuǎn)程檢測器和發(fā)生器
IDT82P2916
16-CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Programming Information
86
April 24, 2010
RCF0 - Receive Configuration Register 0
Address: 00AH, 04AH, 08AH, 0CAH, 10AH, 14AH, 18AH, 1CAH, (CH1~CH8)
20AH, 24AH, 28AH, 2CAH, 30AH, 34AH, 38AH, (CH9~CH15)
7CAH (CH0)
Type: Read / Write
Default Value: 47H
Bit
Name
Description
7
RCKH
This bit determines the output on RCLKn when LLOS is detected. This bit is valid only when LLOS is detected and the AIS and
pattern generation is disabled in the receive path.
0: XCLK. (default)
1: High level.
6
RHZ
This bit determines the output of all receive system interfaced pins (including RDPn, RDNn, RMFn and RCLKn) when the corre-
sponding receiver is powered down.
0: Low level.
1: High-Z. (default)
5
R_OFF
This bit determines whether the receiver is powered down.
0: Normal operation. (default)
1: Power down.
4
R120IN
This bit is valid only when the receive line interface is in Receive Differential mode and per-channel internal impedance matching
configuration is enabled. This bit selects the internal impedance matching mode.
0: Partially Internal Impedance Matching mode. An internal programmable resistor (IM) and a value-fixed external resistor (Rr)
are used. (default)
1: Fully Internal Impedance Matching mode. Only an internal programmable resistor (IM) is used.
3
R_SING
This bit determines the receive line interface.
0: Receive Differential line interface. Both RTIPn and RRINGn are used to receive signal from the line side. (default)
1: Receive Single Ended line interface. Only RTIPn is used to receive signal. RRINGn should be left open.
2 - 0
R_TERM[2:0] These bits are valid only when impedance matching is configured on a per-channel basis. These bits select the impedance
matching mode of the receive path to match the cable impedance.
In Receive Differential mode:
000: The 100
internal impedance matching is selected for T1 100 twisted pair cable.
001: The 110
internal impedance matching is selected for J1 110 twisted pair cable.
010: The 120
internal impedance matching is selected for E1 120 twisted pair cable.
011: The 75
internal impedance matching is selected for E1 75 coaxial cable.
1XX: External impedance matching is selected for T1 100
, J1 110 , E1 120 twisted pair cable and E1 75 coaxial cable.
In Receive Single Ended mode, only External Impedance Matching is supported and the setting of these bits is a don’t-care.
(default)
7654321
0
RCKH
RHZ
R_OFF
R120IN
R_SING
R_TERM2
R_TERM1
R_TERM0
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