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參數(shù)資料
| 型號： | IDT79RC32K438-300BB |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 31/59頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT CORE 300MHZ 416-BGA |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 系列： | Interprise™ |
| 處理器類型： | MIPS32 32-位 |
| 速度： | 300MHz |
| 電壓： | 1.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 416-BGA |
| 供應(yīng)商設(shè)備封裝： | 416-PBGA（27x27） |
| 包裝： | 托盤 |
| 其它名稱： | 79RC32K438-300BB |
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37 of 59
May 25, 2004
IDT 79RC32438
Using the EJTAG Probe
In Figure 23, the pull-up resistors for JTAG_TDO and RST*, the pull-down resistor for JTAG_TRST_N, and the series resistor for JTAG_TDO must
be adjusted to the specific design. However, the recommended pull-up/down resistor is 1.0 k
because a low value reduces crosstalk on the cable to
the connector, allowing higher JTAG_TCK frequencies. A typical value for the series resistor is 33
. Recommended resistor values have ± 5% toler-
ance.
If a probe is used, the pull-up resistor on JTAG_TDO must ensure that the JTAG_TDO level is high when no probe is connected and the
JTAG_TDO output is tri-stated. This requirement allows reliable connection of the probe if it is hooked-up when the power is already on (hot plug). The
pull-up resistor value of around 47 k
should be sufficient. Optional diodes to protect against overshoot and undershoot voltage can be added on the
signals of the chip with EJTAG.
If a probe is used, the RST* signal must have a pull-up resistor because it is controlled by an open-collector (OC) driver in the probe, and thus is
actively pulled low only. The pull-up resistor is responsible for the high value when not driven by the probe of 25pF. The input on the target system
reset circuit must be able to accept the rise time when the pull-up resistor charges the capacitance to a high logical level. Vcc I/O must connect to a
voltage reference that drops rapidly to below 0.5V when the target system loses power, even with a capacitive load of 25pF. The probe can thus detect
the lost power condition.
For additional information on EJTAG, refer to Chapter 20 of the RC32438 User Reference Manual.
Voltage Sense Signal Timing
Figure 24 Voltage Sense Signal Timing
The target system must ensure that Trise is obeyed after the system reaches 0.5V (Tactive), so the probe can use this value to determine when the
target has powered-up. The probe is allowed to measure the Trise time from a higher value than Tactive (but lower than Vcc I/O minimum) because the
stable indication in this case comes later than the time when target power is guaranteed to be stable. If JTAG_TRST_N is asserted by a pulse at
power-up, this reset must be completed after Trise. If JTAG_TRST_N is asserted by a pull-down resistor, the probe will control JTAG_TRST_N. At
power-down, no power is indicated to the probe when Vcc I/O drops under the Tactive value, which the probe uses to stop driving the input signals,
except for the probe RST*.
Phase-Locked Loop (PLL)
The phase-locked loop (PLL) multiplies the external oscillator input (pin CLK) according to the parameter provided by the boot configuration vector
to create the processor clock (PCLK). Inherently, PLL circuits are only capable of generating clock frequencies within a limited range.
PLL Filters
It is recommended that the system designer provide a filter network of passive components for the PLL analog and digital power supplies.
The
PLL circuit power and PLL circuit ground should be isolated from power and ground with a filter circuit such as the one shown in Figure 25.
Because the optimum values for the filter components depend upon the application and the system noise environment, these values should be
considered as starting points for further experimentation within your specific application.
VSENSE
Trise_16f
Tactive
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| IDT79RC32K438-300BBG | 功能描述:IC MPU 32BIT CORE 300MHZ 416-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| IDT79RC32T332-100DH | 功能描述:IC MPU 32BIT CORE 100MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32T332-100DHI | 功能描述:IC MPU 32BIT CORE 100MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32T332-133DH | 功能描述:IC MPU 32BIT CORE 133MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32T332-133DHI | 功能描述:IC MPU 32BIT CORE 133MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
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