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參數(shù)資料
| 型號： | IDT77155 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| 中文描述： | 物理層（增距鏡TC - PMD）的用戶網(wǎng)絡(luò)接口的155Mbps的ATM網(wǎng)絡(luò)中的應(yīng)用 |
| 文件頁數(shù)： | 35/50頁 |
| 文件大?。?/td> | 307K |
| 代理商： | IDT77155 |
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IIDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
8.03
35
RECEIVE CELL UNCORRECTABLE ERROR COUNTER
ADDRESS 0X55
DEFAULT = 8’BXXXXXXXX
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
uncorCnt[7]
uncorCnt[6]
uncorCnt[5]
uncorCnt[4]
uncorCnt[3]
uncorCnt[2]
uncorCnt[1]
uncorCnt[0]
Function
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
Uncorrectable HEC error count bit
NOTE:
1. uncorCnt[7:0] Uncorrectable HEC error count register. This is a cumulative error counter keeping track of errors from the previous poll of these registers.
The error count is polled by writing to either of the HEC error registers (‘h54 or ‘h55), or to address ‘h00. Such a write transfers accumulated errors to a
holding register which may be read later, and the registers are cleared. This transfer and reset of the registers are done such that coincident events are
not lost. All error registers in the receive sections of the transmission convergence blockor the cell delineation block may be polled by a write to the master
register ‘h00.
RECEIVE CELL COUNTER
DEFAULT = 19’H00000
ADDRESS 0X56
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
cellCnt[7]
cellCnt[6]
cellCnt[5]
cellCnt[4]
cellCnt[3]
cellCnt[2]
cellCnt[1]
cellCnt[0]
Function
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
ADDRESS 0X57
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
cellCnt[15]
cellCnt[14]
cellCnt[13]
cellCnt[12]
cellCnt[11]
cellCnt[10]
cellCnt[9]
cellCnt[8]
Function
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
Receive cell counter bit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT77155L155PX | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| IDT77301 | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77301L12PF | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77301L12PFI | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77305 | UTOPIAFIFO 4 PORT MULTIPLEXER FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT77155L155PX | 制造商:INT_DEV_TECH 功能描述: |
| IDT77201L25PF | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT77211L155PQF | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP |
| IDT77V011L155DA | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V011L155DA8 | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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