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參數(shù)資料
| 型號： | IDT77155 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| 中文描述： | 物理層（增距鏡TC - PMD）的用戶網(wǎng)絡(luò)接口的155Mbps的ATM網(wǎng)絡(luò)中的應(yīng)用 |
| 文件頁數(shù)： | 21/50頁 |
| 文件大?。?/td> | 307K |
| 代理商： | IDT77155 |
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IIDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
8.03
21
MASTER CONTROL REGISTER
ADDRESS 0X05
DEFAULT = 8’B00100000
Bit
Bit 7
Type
R/W
Symbol
rxLOCIEn
Function
Loss of cell delineation interrupt enable. When set to a logic one, the
INTB signal of the chip is asserted when a change in the LOC signal
occurs.
Loss of cell delineation (LOC) indication.
Set payload pointer at 522 and disable any pointer movement. (Default = 1)
Reserved
Reserved
Line loopback enable. When a logic one, TXD+/- are connected internally
to RXD+/-.
Diagnostic loopback enable. The serial output and clock streams are
connected internally to the serial input streams.
Loop time operation enable. When a logic one, the transmitter clock is the
recovered receive clock when RBYP is disabled, or RRCLK+/- when
RBYP is asserted. By default, the transmit clock is derived from TRCLK+/-.
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
R
LOC
txFixptr
—
—
txLLoop
R/W
—
—
R/W
Bit 1
R/W
rxDLoop
Bit 0
R/W
rxLoopT
TRANSMIT CLOCK SYNTHESIS CONTROL/STATUS REGISTER
ADDRESS 0X06
DEFAULT = 8’B0000X000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Type
—
—
—
—
R
Symbol
—
—
—
—
txOOL
Function
Reserved
Reserved
Reserved
Reserved
Transmit out of lock status signal indicating the transmit clock synthesis
logic is unable to lock to the reference clock TRCLK+/-.
Reserved
Interrupt enable for the transmit out of lock indication.
Selects the expected frequency of TRCLK+/-. If a logic 0, the reference
frequency is 19.44 MHz, else the reference frequency must be 6.48 MHz.
It affects the clock synthesis frequency only when TBYP is deasserted.
Bit 2
Bit 1
Bit 0
—
R/W
R/W
—
txOOLIEn
txrefSel
RECEIVE CLOCK/DATA RECOVERY CONTROL/STATUS REGISTER
ADDRESS 0X07
DEFAULT = 8’B0000X000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Type
—
—
—
—
R
Symbol
—
—
—
—
rxOOL
Function
Reserved
Reserved
Reserved
Reserved
Receive out of lock status signal indicating the receive clock/data recovery
logic is unable to lock to the input data stream. It is asserted if the
recovered clock is not within 244ppm of the reference clock RRCLK+/- or
if there are no transitions on the RXD+/- inputs for 80n bit periods.
Reserved
Interrupt enable for the receive out of lock indication.
Selects the expected frequency of RRCLK+/-. If a logic 0, the reference
frequency is 19.44 MHz, else the reference frequency must be 6.48 MHz.
It affects the clock/data recovery logic frequency only when RBYP is
deasserted.
Bit 2
Bit 1
Bit 0
—
R/W
R/W
—
rxOOLIEn
rxrefSel
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT77155L155PX | PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS |
| IDT77301 | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77301L12PF | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77301L12PFI | UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO |
| IDT77305 | UTOPIAFIFO 4 PORT MULTIPLEXER FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT77155L155PX | 制造商:INT_DEV_TECH 功能描述: |
| IDT77201L25PF | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT77211L155PQF | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP |
| IDT77V011L155DA | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V011L155DA8 | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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