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參數(shù)資料
| 型號： | IDT29FCT520ATP |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 92K |
| 代理商： | IDT29FCT520ATP |
5
IDT29FCT520AT/BT/CT/DT
MULTILEVELPIPELINEREGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT520AT
FCT520BT
FCT520CT
FCT520DT
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPHL
tPLH
Propagation Delay
CLK to Yn
CL = 50pF
RL = 500
2142
7.5
2
6
2
5.2
ns
tPHL
tPLH
Propagation Delay
S0 or S1 to Yn
2132
7.5
2
6
2
4.8
ns
tSU
Set-up Time, HIGH or LOW
Dn to CLK
5
—
2.5
—
2.5
—
1.5
—
ns
tH
Hold Time, HIGH or LOW
Dn to CLK
2—
2
—
2—1—
ns
tSU
Set-up Time, HIGH or LOW
I0 or I1 to CLK
5—
4
—
4—2—
ns
tH
Hold Time, HIGH or LOW
I0 or I1 to CLK
2—
2
—
2—1—
ns
tPHZ
tPLZ
Output Disable Time
1.5
12
1.5
7
1.5
6
1.5
4.8
ns
tPZH
tPZL
Output Enable Time
1.5
15
1.5
7.5
1.5
6
1.5
4
ns
tW
Clock Pulse Width
HIGH or LOW
7
—
5.5
—
5.5
—
3
—
ns
NOTES:
1. See Test Curcuits and Waveforms.
2. Minimum values are guaranteed but not tested on Propagation Delays.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT29FCT520ATPY | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520ATQ | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520ATSO | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520B | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
| IDT29FCT520BD | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
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