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參數(shù)資料
| 型號： | IDT29FCT520ATP |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 92K |
| 代理商： | IDT29FCT520ATP |
1
IDT29FCT520AT/BT/CT/DT
MULTILEVELPIPELINEREGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
NOVEMBER 1999
1999
Integrated Device Technology, Inc.
DSC-4215/4
c
IDT29FCT520AT/BT/CT/DT
EXTENDED COMMERCIAL TEMPERATURE RANGE
MULTILEVEL
PIPELINE REGISTER
DESCRIPTION:
The 29FCT520T contains four 8-bit positive edge-triggered registers.
These may be operated as a dual 2-level or as a single 4-level pipeline.
A single 8-bit input is provided and any of the four registers is available at
the 8-bit, 3-state output.
These devices are ideal for high speed burst writes and reads in
processor/memory applications.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
A, B, C and D speed grades
Low input and output leakage ≤1A (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
True TTL input and output compatibility
VOH = 3.3V (typ.)
VOL = 0.3V (typ.)
High drive outputs (-15mA IOH, 48mA IOL)
Meets or exceeds JEDEC standard 18 specifications
Available in PDIP, SOIC, SSOP, and QSOP packages
MUX
OCTAL RE G. B1
OCTAL RE G. B2
OCTAL RE G. A2
OCTAL RE G. A1
MUX
OE
Y0 - Y 7
8
REG ISTER
CONTRO L
CLK
I0, I1
1
2
S0, S1
2
D0 - D 7
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT29FCT520ATPY | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520ATQ | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520ATSO | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT29FCT520B | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
| IDT29FCT520BD | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:MULTILEVEL PIPELINE REGISTER |
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