參數(shù)資料
型號: ICS950818
英文描述: Frequency Generator with 200MHz Differential CPU Clocks
中文描述: 頻率發(fā)生器200MHz的CPU的時鐘差分
文件頁數(shù): 6/20頁
文件大?。?/td> 165K
代理商: ICS950818
6
ICS950818
0825F—11/19/03
Pin #
34
35
Name
0
1
PWD
1
1
Bit 7
Bit 6
48MHz_DOT
48MHz_USB
Output control
Output control
Allow control of output with
assertion of PCI_STOP#.
Allow control of output with
assertion of PCI_STOP#.
Allow control of output with
assertion of PCI_STOP#.
Output control
Output control
Output control
RW
RW
Disable
Disable
Enable
Enable
Not
Freerun
Not
Freerun
Not
Freerun
Enable
Enable
Enable
Bit 5
6
PCICLK_F2/PCICLK8 (see
note)
PCICLK_F1/PCICLK7 (see
note)
PCICLK_F0/PCICLK6 (see
note)
PCICLK_F2/PCICLK8
PCICLK_F1/PCICLK7
PCICLK_F0/PCICLK6
PCICLK_F(2:0) can be turned on/off by PCI_STOP#. Refer to table 4.
RW
Freerun
0
Bit 4
5
RW
Freerun
0
Bit 3
4
RW
Freerun
0
Bit 2
Bit 1
Bit 0
Note:
6
5
4
RW
RW
RW
Disable
Disable
Disable
1
1
1
Pin #
10
12
29
31
20
19
18
17
Name
*PCICLK2
*PCICLK3
PCICLK10
3V66_1/VCH_CLK
PCICLK9
3V66_4
3V66_3
3V66_2
0
1
PWD
1
1
1
1
1
1
1
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Output strength (1X/2X)
Output strength (1X/2X)
Output control
Output control
Output control
Output control
Output control
Output control
R/W
R/W
RW
RW
RW
RW
RW
RW
2X
2X
1X
1X
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Pin #
Name
0
1
PWD
Bit 7
X
PD Mode Iref Mirror Enable
Allow Iref Mirror to be ON during
Power Down Mode
Reserved
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
assertion of CPU_STOP#.
00 = Medium (default), 01 = Low,
11,10 =High
00 = Medium (default), 01 = Low,
11,10 =High
RW
OFF
ON
0
Bit 6
X
Reserved
X
-
-
0
Bit 5
X
3V66(4:2) (See table 6)
X
Freerun
Not
Freerun
Not
Freerun
-
-
-
-
0
Bit 4
X
3V66(1) (See table 7)
X
Freerun
0
Bit 3
Bit 2
Bit 1
Bit 0
Note:
RW
RW
RW
RW
-
-
-
-
0
0
0
0
Control Function
Bit Control
Bit Control
BYTE
3
Control Function
Affected Pin
Bit Control
Type
BYTE
4
Affected Pin
BYTE
5
Type
Control Function
Affected Pin
Type
34
48MHz_DOT Slew Control
48MHz_USB Slew Control
35
Functions in Byte 5 of CK408 were intended as a test and debug byte only.
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