參數(shù)資料
型號(hào)： ICS950818
英文描述： Frequency Generator with 200MHz Differential CPU Clocks
中文描述： 頻率發(fā)生器200MHz的CPU的時(shí)鐘差分
文件頁(yè)數(shù)： 11/20頁(yè)
文件大小： 165K
代理商： ICS950818
11
ICS950818
0825F—11/19/03
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+ 0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +90°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only and functional operation of the device at these or any other conditions above those listed
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 90°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
SYMBOL
Input High Voltage
V
IH
Input Low Voltage
V
IL
V
IN
= V
DD
; Inputs with no pull-down
resistors
V
IN
= V
DD
; Inputs with pull-down
resistors
V
IN
= 0 V; Inputs with no pull-up
resistors
V
IN
= 0 V; Inputs with pull-up
resistors
CONDITIONS
MIN
2
V
SS
-0.3
TYP
MAX
V
DD
+0.3
0.8
UNITS
V
V
I
IH
5.75
mA
I
IH
200
μ
A
I
IL1
-5.75
mA
I
IL2
-200
μ
A
I
DD3.3OP
C
L
= Full load; Select @ 100 MHz
182
280
mA
I
DD3.3OP
C
L
=Full load; Select @ 133 MHz
189
280
mA
I
DD3.3PD
I
DD3.3PDHIz
F
i
L
pin
C
IN
C
OUT
C
INX
IREF=5 mA
14
9
52
0.5
mA
mA
MHz
nH
pF
pF
pF
Input Frequency
Pin Inductance
V
DD
= 3.3 V
14.32
7
5
6
45
Logic Inputs
Output pin capacitance
X1 & X2 pins
From PowerUp or deassertion of
PowerDown to 1st clock.
Output enable delay (all outputs)
Output disable delay (all outputs)
27
Clk Stabilization
1,2
T
STAB
2.1
ms
t
PZH
,t
PZL
t
PHZ
,t
PLZ
1
1
12
12
ns
ns
1
Guaranteed by design, not 100% tested in production.
2
See timing diagrams for buffered and un-buffered timing requirements.
Delay
1
Input Capacitance
1
Input High Current
Input Low Current
Operating Supply Current
Powerdown Current
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