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參數(shù)資料
| 型號： | ICS950227YFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, MO-118, SSOP-56 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 128K |
| 代理商： | ICS950227YFLFT |
10
Integrated
Circuit
Systems, Inc.
ICS950227
0641D—07/03/03
I
2C Table: Slew Rate Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
1
Bit 6
0
Bit 5
1
Bit 4
0
Bit 3
1
Bit 2
0
Bit 1
1
Bit 0
0
I
2C Table: Slew Rate Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
RW
1
Bit 6
RW
0
Bit 5
RW
1
Bit 4
RW
0
Bit 3
RW
1
Bit 2
RW
0
Bit 1
RW
1
Bit 0
RW
0
I
2C Table: Slew Rate Control Register
Bit 7
PCISlw1
PCI (6:4) Slew Rate
Control
RW
-
1
Bit 7
Reserved
RW
-
0
Bit 6
Reserved
RW
-
0
Bit 5
RW
1
Bit 4
RW
0
Bit 3
Reserved
RW
-
0
Bit 2
Reserved
RW
-
0
Bit 1
Reserved
RW
-
0
Bit 0
Reserved
RW
-
0
VCSLW
VCH Slew Rate
Control
10=STRONG
00= MEDIUM
01= WEAK
-
PWD
-
Control Function
PCISlw
PCICLK0 Slew Rate
Control
10=STRONG
00= MEDIUM
01= WEAK
-
10=STRONG
00= MEDIUM
01= WEAK
-
PCISlw
PCICLK (3:1) Slew
Rate Control
10=STRONG
00= MEDIUM
01= WEAK
-
PCISlw
PCICLK (6:4) Slew
Rate Control
10=STRONG
00= MEDIUM
01= WEAK
Byte 22
-
PCISlw
REF Slew Rate Control
10=STRONG
00= MEDIUM
01= WEAK
-
3V66SLW
RW
3V66SLW
3V66 (1:0) Slew Rate
Control
RW
PCISlw
PCICLK_F1:0 Slew
Rate Control
RW
10=STRONG
00= MEDIUM
01= WEAK
PCISlw
PCICLK_F2 Slew Rate
Control
RW
10=STRONG
00= MEDIUM
01= WEAK
Byte 21
-
Byte 23
Pin #
-
Name
Type
0
1
3V66 (5:2) Slew Rate
Control
10=STRONG
00= MEDIUM
01= WEAK
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| ICS950227YFT | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS950227YFLFT | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
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