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Networking Clock Source
MDS 650-27 D
2
Revision 070505
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
ICS650-27
Pin Assignment
Pin Descriptions
13
4
12
5
11
ASC1
8
9
10
VDD
CLKC2
CLKA2
CCS
CLKB2
DC
17
16
CLKB1
3
X1/ICLK
VDD
CLKA1
18
REFOUT
1
ASC0
X2
BCS0
20
BCS1
19
14
2
7
GND
CLKC1
OE
GND
15
6
20-pin (150 mil) SSOP
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
2
ACS0
X2
Input
Input
A clock select 0. Selects outputs on CLKA1 and CLKA2 per table on page 3.
Crystal connection. Connect to a fundamental crystal or leave unconnected for a clock
input.
3
4
5
X1/ICLK
VDD
ACS1
Input
Power
Input
Crystal connection. Connect to a fundamental crystal or clock input.
Connect to +3.3 V or 5 V. Must be the same as pin 16.
A clock select 1. Selects outputs on CLKA1 and CLKA2 per table on page 3. Internal
pull-up.
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GND
CLKC1
CLKC2
CLKB2
CLKB1
CCS
DC
CLKA2
GND
OE
VDD
CLKA1
REFOUT
BCS0
BCS1
Power
Output
Output
Output
Output
Input
-
Output
Power
Input
Power
Output
Output
Input
Input
Connect to ground.
Output Clock C1. Depends on setting of CCS per table on page 3.
Output Clock C2. Depends on setting of CCS per table on page 3. Same as CLKC1.
Output Clock B2. Depends on setting of BCS1, 0 per table on page 3.
Output Clock B1. Depends on setting of BCS1, 0 per table on page 3.
Clock C select pin. Selects outputs on CLKC1 and CLKC2 per table on page 3.
Don’t connect. Do not connect anything to this pin.
Output Clock A2. Depends on setting of ACS1, 0 per table on page 3.
Connect to ground.
Output enable. Tri-states all outputs when low. Internal pull-up.
Connect to +3.3 V or 5 V. Must be the same as pin 4.
Output Clock A1. Depends on setting of ACS1, 0 per table on page 3.
Buffered reference clock output. Same frequency as crystal or clock input.
B clock select 0. Selects outputs on CLKB1 and CLKB2 per table on page 3.
B clock select 1. Selects outputs on CLKB1 and CLKB2 per table on page 3. Internal
pull-up.