參數(shù)資料
型號: ICS650-36
英文描述: Networking & PCI Clock Source
中文描述: 網(wǎng)絡(luò)
文件頁數(shù): 1/7頁
文件大小: 117K
代理商: ICS650-36
ICS650-36
MDS 650-36 D
1
Revision 030206
Integrated Circuit Systems
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
Networking & PCI Clock Source
Description
The ICS650-36 is a low cost frequency generator
designed to support networking and PCI applications.
Using analog/digital Phase Locked-Loop (PLL)
techniques, the device uses a standard fundamental
mode, inexpensive crystal input of 25 MHz to produce
four output clocks supporting LAN, PCI, and 100M
SDRAM functions.
The device also has a power down feature that
tri-states the clock outputs and turns off the PLL when
the PDTS pin is taken low.
Features
Packaged in 16-pin TSSOP
Available in Pb (lead) free package
Replaces multiple crystals and oscillators
Input crystal or clock frequency of 25 MHz
Fixed reference output frequency of 25 MHz
Selectable output frequencies of 33.3, 33.333, 50,
66.666, 100, and 125 MHz
Duty cycle of 40/60
Operating voltage of 3.3 V
Advanced, low-power CMOS process
Industrial and commercial temperature ranges
Block Diagram
X1/ICLK
X2
PLL1
PLL2
Crystal
Oscillator/
Clock
Buffer
25 MHz
crystal
input
External capacitors
may be required.
VDD
GND
PDTS
(all outputs and PLLs)
CLK1
3
3
PLL3
CLK3
CLK2
REF
Select/
Control
Circuit
3
S2:0
相關(guān)PDF資料
PDF描述
ICS650G-36 Networking & PCI Clock Source
ICS650G-36LF Networking & PCI Clock Source
ICS650G-36LFT Networking & PCI Clock Source
ICS650G-36T Networking & PCI Clock Source
ICS650GI-36 Networking & PCI Clock Source
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