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Networking & PCI Clock Source
MDS 650-36 D
2
Revision 030206
Integrated Circuit Systems
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
ICS650-36
Pin Assignment
CLK Output Selection Table
Note: All frequencies are in MHz.
Pin Descriptions
12
11
10
9
1
2
3
4
5
6
7
8
X2
X1
GND
CLK3
PDTS
GND
REF
S0
VDD
CLK1
GND
S2
S1
CLK2
VDD
16
15
14
13
VDD
16-pin (173 mil) TSSOP
S2
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
REF
OFF
ON
ON
ON
ON
ON
ON
ON
CLK1
33.30
33.333
33.333
66.666
33.333
33.333
33.333
33.30
CLK2
50
33.333
66.666
66.666
50
50
66.666
50
CLK3
125
125
125
125
125
100
100
125
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X2
Output
Crystal connection. Connect to 25 MHz crystal input or float for
clock.
2
X1
Input
Crystal connection. Connect to 25 MHz crystal or clock input.
3
GND
Power
Connect to ground.
4
CLK3
Output
Selectable clock output. See table above for frequency. Weak
internal pull-down when tri-state.
5
PDTS
Input
Powers down entire chip and tri-states outputs when low. Internal
pull-up resistor.
6
S2
Input
Select pin. Selects clock output frequency from table above.
Internal pull-up resistor.
7
CLK2
Output
Selectable clock output. See table above for frequency. Weak
internal pull-down when tri-state.
8
VDD
Power
Connect to +3.3 V.
9
S1
Input
Select pin. Selects clock output frequency from table above.
Internal pull-up resistor.
10
GND
Power
Connect to ground.
11
CLK1
Output
Selectable clock output. See table above for frequency. Weak
internal pull-down when tri-state.
12
VDD
Power
Connect to +3.3 V.
13
S0
Input
Select pin. Selects clock output frequency from table above.
Internal pull-up resistor.