參數(shù)資料
型號: IBMN625804GT3B
廠商: IBM Microeletronics
英文描述: 256Mb Double Data Rate Synchronous DRAM(256M位雙數(shù)據(jù)速率同步動態(tài)RAM)
中文描述: 256MB雙數(shù)據(jù)速率同步DRAM(256M位雙數(shù)據(jù)速率同步動態(tài)RAM)的
文件頁數(shù): 68/79頁
文件大?。?/td> 1328K
代理商: IBMN625804GT3B
I
I
2
P
U
P
2
1
S
200 cycles
t
IH
t
IS
t
XSRD,
t
XSRN
t
IH
t
IS
t
IS
t
IS
t
IH
t
IS
t
RP
*
t
CK
t
CL
t
CH
AR
VALID
NOP
VALID
Enter Self
Refresh Mode
Exit Self
Refresh Mode
NOP
*
= Device must be in the all banks idle state before entering Self Refresh Mode.
**
= t
XSNR
is required before any non-read command can be applied, and t
XSRD
(200 cycles of CK).
are required before a Read command can be applied.
CKE
Command
ADDR
DQS
DQ
DM
Don’t Care
CK
CK
Clock must be stable before exiting Self Refresh Mode
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