參數(shù)資料
型號： IBMN625804GT3B
廠商： IBM Microeletronics
英文描述： 256Mb Double Data Rate Synchronous DRAM(256M位雙數(shù)據(jù)速率同步動態(tài)RAM)
中文描述： 256MB雙數(shù)據(jù)速率同步DRAM（256M位雙數(shù)據(jù)速率同步動態(tài)RAM）的
文件頁數(shù)： 60/79頁
文件大?。?/td> 1328K
代理商： IBMN625804GT3B
IBMN625404GT3B
IBMN625804GT3B
256Mb Double Data Rate Synchronous DRAM
Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 60 of 79
29L0011.E36997B
1/01
t
IS
Address and control input setup time (fast
slew rate)
0.9
0.9
1.1
ns
2, 3, 4,
11, 13,
14
t
IH
Address and control input hold time (slow
slew rate)
1.0
1.0
1.1
ns
2, 3, 4,
12, 13,
14, 17
t
IS
Address and control input setup time (slow
slew rate)
1.0
1.0
1.1
ns
2, 3, 4,
12, 13,
14, 17
t
IPW
Input pulse width
2.2
2.2
ns
2, 3, 4,
14
t
RPRE
Read preamble
0.9
1.1
0.9
1.1
0.9
1.1
t
CK
1, 2, 3, 4
t
RPST
Read postamble
0.40
0.60
0.40
0.60
0.40
0.60
t
CK
1, 2, 3, 4
t
RAS
Active to Precharge command
45
120,000
45
120,000
50
120,000
ns
1, 2, 3, 4
t
RC
Active to Active/Auto-refresh command
period
65
65
70
ns
1, 2, 3, 4
t
RFC
Auto-refresh to Active/Auto-refresh com-
mand period
75
75
80
ns
1, 2, 3, 4
t
RCD
Active to Read or Write delay
20
20
20
ns
1, 2, 3, 4
t
RAP
Active to Read Command with Autopre-
charge
20
20
20
ns
1, 2, 3, 4
t
RP
Precharge command period
20
20
20
ns
1, 2, 3, 4
t
RRD
Active bank A to Active bank B command
15
15
15
ns
1, 2, 3, 4
t
WR
Write recovery time
15
15
15
ns
1, 2, 3, 4
t
DAL
Auto precharge write recovery + precharge
time
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
t
CK
1, 2, 3,
4, 16
t
WTR
Internal write to read command delay
1
1
1
t
CK
1, 2, 3, 4
t
XSNR
Exit self-refresh to non-read command
75
75
80
ns
1, 2, 3, 4
t
XSRD
Exit self-refresh to read command
200
200
200
t
CK
1, 2, 3, 4
t
REFI
Average Periodic Refresh Interval
7.8
7.8
7.8
μ
s
1, 2, 3,
4, 8
t
QCS
QFC setup time on Read
0.9
1.1
0.9
1.1
0.9
1.1
t
CK
1, 2, 3,
4, 15
t
QCH
QFC hold time on Read
0.4
0.6
0.4
0.6
0.4
0.6
t
CK
1, 2, 3,
4, 15
t
QCSW
Delay from CK edge of write command to
QFC low on write
4.0
4.0
4.0
ns
1, 2, 3,
4, 9, 15
t
QCHW
QFC hold time on write
1.25
2.0
1.25
2.0
1.25
2.0
ns
1, 2, 3,
4, 10, 15
Electrical Characteristics & AC Timing for DDR266/DDR200 - Absolute
Specifications
(0
°
C
≤
T
A
≤
70
°
C
;
V
DDQ
= 2.5V
±
0.2V; V
DD
= 2.5V
±
0.2V, See AC Characteristics) (Part 2 of 2)
Symbol
Parameter
DDR266A (7N)
DDR266B (75N)
DDR200 (8N)
Unit
Notes
Min
Max
Min
Max
Min
Max
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