- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67684 > IBM25PPC750L-DB0A350W 32-BIT, 350 MHz, RISC PROCESSOR, CBGA360 PDF資料下載
參數(shù)資料
| 型號： | IBM25PPC750L-DB0A350W |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 350 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 22/46頁 |
| 文件大?。?/td> | 610K |
| 代理商： | IBM25PPC750L-DB0A350W |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
9/30/99
Version 2.0
Datasheet
Page 25
PowerPC 750 SCM RISC Microprocessor
Preliminary Copy
PID8p-750
GND
D10, D14, D16, D4, D6, E12, E8, F4, F6, F10, F14, F16, G9, G11,
H5, H8, H10, H12, H15, J9, J11, K4, K6, K8, K10, K12, K14, K16,
L9, L11, M5, M8, M10, M12, M15, N9, N11, P4, P6, P10, P14, P16,
R8, R12, T4, T6, T10, T14, T16
——
HRESET
B6
Low
Input
INT
C11
Low
Input
L1_TSTCLK1
F8
High
Input
L2ADDR[0-16]
L17, L18, L19, M19, K18, K17, K15, J19, J18, J17, J16, H18, H17,
J14, J13, H19, G18
High
Output
L2AVDD
L13
—
L2CE
P17
Low
Output
L2CLKOUTA
N15
—
Output
L2CLKOUTB
L16
—
Output
L2DATA[0-63]
U14, R13, W14, W15, V15, U15, W16, V16, W17, V17, U17, W18,
V18, U18, V19, U19, T18, T17, R19, R18, R17, R15, P19, P18, P13,
N14, N13, N19, N17, M17, M13, M18, H13, G19, G16, G15, G14,
G13, F19, F18, F13, E19, E18, E17, E15, D19, D18, D17, C18, C17,
B19, B18, B17, A18, A17, A16, B16, C16, A14, A15, C15, B14, C14,
E13
High
I/O
L2DP[0-7]
V14, U16, T19, N18, H14, F17, C19, B15
High
I/O
L2OVDD
D15, E14, E16, H16, J15, L15, M16, P15, R14, R16, T15, F15
—
L2SYNC_IN
L14
—
Input
L2SYNC_OUT
M14
—
Output
L2_TSTCLK1
F7
High
Input
L2WE
N16
Low
Output
L2ZZ
G17
High
Output
LSSD_MODE1
F9
Low
Input
MCP
B11
Low
Input
NC (No-Connect)
B3, B4, B5, W19, K9, K114, K194
——
OVDD 2
D5, D8, D12, E4, E6, E9, E11, F5, H4, J5, L5, M4, P5, R4, R6, R9,
R11, T5, T8, T12
——
Pinout Listing for the 360 CBGA package5
Signal Name
Pin Number
Active
I/O
Note:
1. These are test signals for factory use only and must be pulled up to OVDD for normal machine operation.
2. OVDD inputs supply power to the I/O drivers and VDD inputs supply power to the processor core.
3. Internally tied to L2OVDD in the PID8p-750 360 CBGA package. This is NOT a supply pin.
4. These pins are reserved for potential future use as additional L2 address pins.
5. Pull up and pull down resistor requirements for all pins are listed in the “Pull-up / Pull-down Resistor Requirements” section on page 33
6. BVSEL selects the I/O voltage on the 60X bus. L2VSEL selects the I/O voltage on the L2 bus. Please refer to the Table “Recommended Operating
Conditions1,2,3,” on page 6, for the use of these pins.
7. TCK must be tied high or low for normal machine operation.
8. Address and data parity signals must be tied high or low if unused in the design.
9. Starting with rev levels dd3.X, the AVDD pin is no longer brought out to the package.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM25PPC970FX6UB267ET | 64-BIT, 1800 MHz, RISC PROCESSOR, CBGA576 |
| IBM25PPC970MP7TR21AFT | 64-BIT, 1600 MHz, RISC PROCESSOR, CBGA575 |
| IBM26BL486DX2-V66QP | 32-BIT, 66 MHz, MICROPROCESSOR, PQFP208 |
| IBM26BL486DX2-V80QP | 32-BIT, 80 MHz, MICROPROCESSOR, PQFP208 |
| IBM26BL486DX2-V50GP | 32-BIT, 50 MHz, MICROPROCESSOR, CPGA168 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM25PPC750L-DB0A366W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IBM25PPC750L-DB0A375W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IBM25PPC750L-DB0A400W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IBM25PPC750L-DB0B300W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| IBM25PPC750L-DB0B333W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。