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| 型號(hào)： | IBM25NPE405L-3FA200CZ |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324 |
| 封裝： | 23 X 23 MM, PLASTIC, EBGA-324 |
| 文件頁數(shù)： | 47/52頁 |
| 文件大?。?/td> | 907K |
| 代理商： | IBM25NPE405L-3FA200CZ |
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Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
51
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Strapping
While the SysReset input pin is low (system reset), the state of certain I/O pins is read to enable default initial
conditions prior to NPe405L start-up. The actual capture instant is the nearest SysClk edge before the
deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down (logical 0)
resistors to select the desired default conditions. The recommended pull-up is 3 k
to +3.3V or 10k to +5V,
the recommended pull-down is 1k
to GND.These pins are used for strap functions only during reset. They
are used for other signals during normal operation. The following table lists the strapping pins along with their
functions and strapping options.
Strapping Pin Assignments
Function
Option
Ball Strapping
EXT_BootW
Width of boot device on EBC data bus
Y21
(UART1_Tx)
8 bits
0
16 bits
1
ZMII_Mode
Ethernet ZMII mode
V21
(UART1_RTS)
U20
(UART1_DTR)
MII mode
0
SMII mode
0
1
RMII 10 Mbps mode
1
0
RMII 100 Mbps mode
1
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相關(guān)代理商/技術(shù)參數(shù) |
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| IBM25NPE405L-3FA266C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerNP |
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| IBM25PPC403GAJC33C1 | 制造商:IBM 功能描述: |
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| IBM25PPC405CR-3BC200CZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|316PIN|PLASTIC |
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