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參數(shù)資料
| 型號： | IBM13N16734HC |
| 廠商： | IBM Microeletronics |
| 英文描述： | 16M x 72 2 Bank Unbuffered SDRAM Module(16M x 72 2組不帶緩沖同步動態(tài)RAM模塊) |
| 中文描述： | 16米x 72 2行無緩沖內(nèi)存模組（16米x 72 2組不帶緩沖同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 651K |
| 代理商： | IBM13N16734HC |
IBM13N16644HC
IBM13N16734HC
16M x 64/72 2 Bank Unbuffered SDRAM Module
19L7123.E93760A
2/99
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 7 of 18
30
Minimum RAS Pulse width (t
RAS
)
-260, -360
-10
50ns
60ns
64MB
2.0ns
3.0ns
1.0ns
1.0ns
2.0ns
3.0ns
1.0ns
1.0ns
32
3C
10
20
30
10
10
20
30
10
10
31
Module Bank Density
Address and Command Setup Time Before
Clock
32
-260, -360
-10
-260, -360
-10
-260, -360
-10
-260, -360
-10
33
Address and Command Hold Time After
Clock
34
Data Input Setup Time Before Clock
35
Data Input Hold Time After Clock
36 -
61
Reserved
Undefined
00
62
SPD Revision
-260, -360
-10
1.2A
2
12
02
cc
63
64 -
71
Checksum for bytes 0 - 62
Checksum Data
2
Manufacturers’ JEDEC ID Code
IBM
A400000000000000
72
Module Manufacturing Location
Toronto, Canada
Vimercate, Italy
91
53
73 -
90
Module Part Number
16M x 64,
-260
16M x 64,
-360
16M x 64,
-10
16M x 72,
-260
16M x 72,
-360
16M x 72,
-10
ASCII ‘13N16644HC”R”-260T’
31334E31363634344843rr2
D323630542020
31334E31363634344843rr2
D333630542020
31334E31363634344843rr2
D313054202020
31334E31363733344843rr2
D323630542020
31334E31363733344843rr2
D333630542020
31334E31363733344843rr2
D313054202020
3, 4
ASCII ‘13N16644HC”R”-360T’
ASCII ‘13N16644HC”R”-10T’
ASCII ‘13N16734HC”R”-260T’
ASCII ‘13N16734HC”R”-360T’
ASCII ‘13N16734HC”R”-10T’
91 -
92
93 -
94
95 -
98
99 -
125
Module Revision Code
“R” plus ASCII blank
rr20
3, 4
Module Manufacturing Date
Year/Week Code
yyww
5, 6
Module Serial Number
Serial Number
ssssssss
7
Reserved
Undefined
00
126
Module Supports this Clock Frequency
-260, -360
-10
100 MHz
66 MHz
64
66
127
Attributes for Clock Frequency defined in
byte 126
-260
CK0, CK1, CK2, CK3, CL3,
CL2, concurrent AP
CK0, CK1, CK2, CK3, CL3,
concurrent AP
CL3, CL2
F7
-360
F5
-10
06
128 -
255
Open for Customer Use
Undefined
00
Serial Presence Detect (Part 2 of 2)
Byte #
Description
SPD Entry Value
Serial PD Data Entry
(Hexadecimal)
Notes
1. See the AC output load circuit in the AC Characteristics section below
2. cc = Checksum Data byte, 00-FF (Hex)
3. “R” = Alphanumeric revision code, A-Z, 0-9
4. rr = ASCII coded revision code byte “R”
5. yy = Binary coded decimal year code, 00-99 (Decimal)
00-63 (Hex)
6. ww = Binary coded decimal week code, 01-52 (Decimal)
01-34 (Hex)
7. ss = Serial number data byte, 00-FF (Hex)
Discontinued (8/99 - last order; 12/99 - last ship)
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