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參數(shù)資料
| 型號： | IBM11M2735H |
| 廠商： | IBM Microeletronics |
| 英文描述： | 2M x 72 DRAM MODULE(2M x 72動態(tài)RAM模塊) |
| 中文描述： | 200萬× 72 DRAM模塊（2米× 72動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 1/29頁 |
| 文件大?。?/td> | 542K |
| 代理商： | IBM11M2735H |
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IBM11M2735H
IBM11M2735HB
2M x 72 DRAM MODULE
50H4199
SA14-4615-02
Revised 5/96
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 29
Features
168 Pin JEDEC Standard, 8 Byte Dual In-line
Memory Module
2Mx72 Fast Page Mode DIMM
Performance:
All inputs and outputs are LVTTL (3.3V) or TTL
(5.0V) compatible
Single 3.3V
±
0.3V or 5.0V
±
0.5V Power Supply
Au contacts
Optimized for ECC applications
System Performance Benefits:
- Buffered inputs (except RAS, Data)
- Reduced noise (32 V
SS
/V
CC
pins)
- Buffered PDs
Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
Refresh Modes: RAS-Only, CBR and Hidden
Refresh
2048 refresh cycles distributed across 32ms
11/10 addressing (Row/Column)
Card size: 5.25" x 1.0" x 0.157"
DRAMS in TSOP Package
Description
IBM11M2735H is an industry standard 168-pin
8-byte Dual In-line Memory Module (DIMM) which is
organized as a 2Mx72 high speed memory array
designed with EDO DRAMs for ECC applications.
The DIMM uses 9 2Mx8 DRAMs in TSOP packages.
The use of EDO DRAMs allows for a reduction in
Page Mode Cycle time from 40ns (Fast Page) to
25ns for 60ns DRAM modules.
Improved system performance is provided by the
on-DIMM buffering of selected input signals. The
specified timings include all buffer, net and skew
delays, which simplifies the memory subsystem
design analysis. The data and
RAS
signals are not
buffered, which preserves the DRAM access specifi-
cations of 60ns and 70ns.
Presence Detect (PD) and Identification Detect (ID)
bits provide information about the DIMM density,
addressing, performance and features. PD bits can
be dotted at the system level and activated for each
DIMM position using the PD enable (PDE) signal. ID
bits also allow detection of card features, and may
be dot-or’d at the system level to provide information
for the entire DIMM bank. For example, the system
will determine that ECC DIMMs are installed if PD8
is low (0). ID0 need not be sensed since both x72
and x80 ECC DIMMs will function in a x72 bank.
All IBM 168-pin DIMMs provide a high performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products are the x64 and x72 par-
ity (5V) DIMMs and ECC DIMMs (5V and 3.3V).
-60
-70
t
RAC
RAS Access Time
60ns
70ns
t
CAC
CAS Access Time
20ns
25ns
t
AA
Access Time From Address
35ns
40ns
t
RC
Cycle Time
104ns
124ns
t
HPC
EDO Page Mode Cycle Time
25ns
30ns
Card Outline 3.3V
1
85
10
94
11
95
40
124
41
125
84
168
(Front)
(Back)
See Detail A
for 5.0V Version
Detail A
IBM11M1730BB1M x 72 E10/10, 3.3V, Au.
Discontinued (9/98 - last order; 3/99 - last ship)
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