
IBM11M32845CB
PRELIMINARY
32M x 72 Chipkill Correct DRAM Module
20L9836.00
8/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 29
Features
168-Pin JEDEC Standard, 8-Byte Dual In-line
Memory Module
32M x 72 (Dual Bank) Chipkill Correct EDO
DIMM
Performance:
All inputs and outputs are LVTTL compatible
Single 3.3V
±
0.15V Power Supply
Gold contacts
Optimized for ECC applications
System Performance Benefits:
- Buffered inputs (except RAS)
- Reduced noise (32 V
SS
/V
DD
pins)
- Buffered PDs
Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
Refresh Modes: RAS-Only, CBR, and Hidden
Refresh
8192 refresh cycles distributed across 128ms
Card sizes: 5.25" x 1.90" x 0.320"
DRAM
S
in TSOJ Package
Description
IBM11M32885B/C is an industry-standard 168-pin
8-byte Dual In-line Memory Module (DIMM) for ECC
applications which is organized as a 32M x 72 high-
speed memory array and is configured as two 16M x
72 banks. The DIMM uses additional checkbit
DRAMs and an ASIC to provide chipkill correction
when deployed in existing single-error-correct ECC
systems.
Improved system performance is provided by the
on-DIMM buffering of selected input signals. The
specified timings include all buffer, net, and skew
delays, which simplifies the memory subsystem
design analysis. The RAS signals are not buffered,
which preserves the DRAM access specifications of
50ns.
Presence Detect (PD) and Identification Detect (ID)
bits provide information about the DIMM density,
addressing, performance, and features. PD bits can
be dotted at the system level and activated for each
DIMM position using the PD enable (PDE) signal. ID
bits also allow detection of card features, and may
be dot-or’ed at the system level to provide informa-
tion for the entire DIMM bank.
All IBM 168-pin DIMMs provide a high-performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products are the x64 and x72 par-
ity (5V) DIMMs and ECC DIMMs (5V and 3.3V).
-5R
50ns
19ns
34ns
101ns
22ns
t
RAC
t
CAC
t
AA
t
RC
t
HPC
RAS Access Time
CAS Access Time
Access Time From Address
Cycle Time
EDO Mode Cycle Time
Card Outline
1
85
10
94
11
95
40
124
41
125
84
168
(Front)
(Back)
IBM11M32845CB32M x 72 E12/12, 3.3V, Au, EDOMMDL18DSU-001041529.
32M x 72 E13/11, 3.3V, Au, EDOMMDL18DSU-001041529.
Discontinued (7/00 - last order; 9/00 - last ship)