參數(shù)資料
型號(hào): HYS72D256520GR
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184 Pin Registered Double Data Rate SDRAM Modules
中文描述: 184針注冊(cè)雙倍數(shù)據(jù)速率SDRAM模塊
文件頁(yè)數(shù): 17/25頁(yè)
文件大?。?/td> 638K
代理商: HYS72D256520GR
HYS72D256520GR-7-A
Registered Double Data Rate SDRAM Modules
SPD Contents
Data Sheet
18
Rev. 1.02, 2003-12
10282003-P6EY-RWQ2
4
SPD Contents
Table 11
SPD Codes for
Product Type & Organization
HYS72D256520GR–7–A
2 GByte
×
72
2 Ranks
PC2100R–20330
Rev 0.0
HEX
80
08
07
0D
0C
02
48
00
04
70
75
02
82
04
04
01
0E
04
0C
01
02
26
C0
75
75
00
00
50
3C
50
2D
01
Label Code
Jedec SPD Revision
Description
Programmed SPD Bytes in E2PROM
Total number of Bytes in E2PROM
Memory Type (DDR = 07h)
Number of Row Addresses
Number of Column Addresses
Number of DIMM Ranks
Data Width (LSB)
Data Width (MSB)
Interface Voltage Levels
tCK @ CLmax (Byte 18) [ns]
tAC SDRAM @ CLmax (Byte 18) [ns]
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
tCCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
tCK @ CLmax -0.5 (Byte 18) [ns]
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
tAC SDRAM @ CLmax -1 [ns]
tRPmin [ns]
tRRDmin [ns]
tRCDmin [ns]
tRASmin [ns]
Module Density per Rank
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
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