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參數(shù)資料
| 型號： | HYB25D128800AT-6 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 128 Mbit Double Data Rate SDRAM |
| 中文描述： | 128兆雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 52/79頁 |
| 文件大?。?/td> | 2596K |
| 代理商： | HYB25D128800AT-6 |
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HYB25D128[400/800/160]A-[6/7/8]
128Mbit Double Data Rate SDRAM
Electrical Characteristics
Data Sheet
52
Rev. 1.06, 2004-01
09192003-LFQ1-R60G
Table 13
Parameter
Electrical Characteristics and DC Operating Conditions
Symbol
Min.
Device Supply Voltage
V
DD
Output Supply Voltage
V
DDQ
EEPROM supply voltage
V
DDSPD
Supply Voltage, I/O Supply
Voltage
V
SSQ
Input Reference Voltage
V
REF
I/O Termination Voltage
(System)
Input High (Logic1) Voltage
V
IH(DC)
Input Low (Logic0) Voltage
V
IL(DC)
Input Voltage Level,
CK and CK Inputs
Input Differential Voltage,
CK and CK Inputs
VI-Matching Pull-up
Current to Pull-down
Current
Input Leakage Current
I
I
Values
Typ.
2.5
2.5
2.5
Unit Note/Test Condition
1)
1) 0
°
C
≤
T
A
≤
70
°
C
2) Under all conditions,
V
DDQ
must be less than or equal to
V
DD
.
3) Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF (DC)
.
V
REF
is also expected to track noise variations in
V
DDQ
.
4)
V
TT
is not applied directly to the device.
V
TT
is a system supply for signal termination resistors, is expected to be set equal
to
V
REF
, and must track variations in the DC level of
V
REF
.
5)
V
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
6) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire
temperature and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the
maximum difference between pull-up and pull-down drivers due to process variation.
7) Inputs are not recognized as valid until
V
REF
stabilizes.
8) Values are shown per component
Max.
2.7
2.7
3.6
0
2.3
2.3
2.3
0
V
V
V
V
f
CK
≤
166 MHz
f
CK
≤
166 MHz
2)
—
—
V
SS
,
0.49
×
V
DDQ
0.5
×
V
DDQ
0.51
×
V
DDQ
V
V
REF
– 0.04
3)
V
TT
V
REF
+ 0.04 V
4)
V
REF
+ 0.15
–0.3
–0.3
V
DDQ
+ 0.3
V
REF
– 0.15 V
V
DDQ
+ 0.3
V
7)
7)
V
IN(DC)
V
7)
V
ID(DC)
0.36
V
DDQ
+ 0.6
V
7)5)
VI
Ratio
0.71
1.4
—
6)
–2
2
μ
A
Any input 0 V
≤
V
IN
≤
V
DD
;
All other pins not under test
= 0 V
7)8)
DQs are disabled;
0 V
≤
V
OUT
≤
V
DDQ
7)
V
OUT
= 1.95 V
7)
Output Leakage Current
I
OZ
–5
5
μ
A
Output High Current,
Normal Strength Driver
Output Low
Current, Normal Strength
Driver
I
OH
—
–16.2
mA
I
OL
16.2
—
mA
V
OUT
= 0.35 V
7)
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