This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.03 / Jun. 2000 Hyundai Semiconductor
HY628400A Series
512Kx8bit CMOS SRAM
DESCRIPTION
The HY628400A is a high-speed, low power and
4M bits CMOS SRAM organized as 512K words
by 8 bits. The HY628400A uses Hyundai's high
performance twin tub CMOS process technology
and was designed for high-speed and low power
circuit technology. It is particularly well suited for
use in high-density and low power system
applications. This device has a data retention
mode that guarantees data to remain valid at the
minimum power supply voltage of 2.0V.
Product
Voltage
No.
(V)
HY628400A
4.5~5.5
Note 1. Current value is max.
PIN CONNECTION
FEATURES
Fully static operation and Tri-state outputs
TTL compatible inputs and outputs
Low power consumption
Battery backup(L/LL-part)
-. 2.0V(min) data retention
Standard pin configuration
-. 32pin 525mil SOP
-. 32pin 400mil TSOP-II
(Standard and Reversed)
Speed
(ns)
55/70/85
Operation
Current/Icc(mA)
10
Standby Current(uA)
L
100
Temperature
(
°
C)
0~70
LL
30
1
2
3
4
5
6
7
8
9
10
32
23
Vcc
/WE
A18
A7
Vss
SOP TSOPII(Standard) TSOPII(Reversed)
PIN DESCRIPTION BLOCK DIAGRAM
Pin Name
Pin Function
/CS
Chip Select
/WE
Write Enable
/OE
Output Enable
A0 ~ A18
Address Inputs
I/O1 ~ I/O8
Data Inputs/Outputs
Vcc
Power(4.5~5.5V)
Vss
Ground
A17
A7
IVss
1
2
3
4
5
6
7
8
9
10
32
A17
/WE
A13
/CS
I/O8
Vcc
1
2
3
4
5
6
7
8
9
10
15
32
A18
A7
A4
MEMORY ARRAY
512Kx 8
ROW DECODER
S
W
D
B
I/O1
I/O8
C
A
A0
A18
/CS
/OE
/WE
C
L