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參數(shù)資料
| 型號(hào)： | HV7131RP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號(hào)處理 |
| 文件頁數(shù)： | 8/61頁 |
| 文件大?。?/td> | 2621K |
| 代理商： | HV7131RP |
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HV7131GP
2004/10/29 V2.4 8
Pin
Type
Symbol
Description
1-3
B
C[2:0]
Video Chrominance Data[2:0]
4
G
DGNDI
Digital Ground for I/O Buffer
5
P
DVDDI
Digital Power for I/O Buffer
6
N
NC
No Connection
7-14
O
Y[7:0]
Video Luminance Data[7:0]
15
G
DGNDC
Ground for Internal Digital Block
16
P
DVDDC
Power for Internal Digital Block
17
G
DGNDI
Digital Ground for I/O Buffer
18
I
MCLK
Master Input Clock
19
O
VCLK
Video Output Clock
20
O
HSYNC
Video Horizontal Line Synchronization signal. Image data is
valid, when HSYNC is high.
21
O
VSYNC
Video Frame Synchronization signal. VSYNC is active at start
of image data frame.
22
B
SDA
I2C Standard data I/O port
23
I
SCK
I2C Clock Input
24
G
DGNDI
Digital Ground for I/O Buffer
25
P
DVDDI
Digital Power for I/O Buffer
26
N
NC
No Connection
27
P
AVDD
Power for Analog Block
28
G
AGND
Ground for Analog Block
29
O
STROBE
Strobe Signal Output
30
I
RESETB
Sensor Reset, Low Active
31
I
ENB
Sensor sleep mode is controlled externally by this pin when
sleep mode register bit SCTRB[4] is low.
ENB low : sleep mode, ENB high : normal mode
32
P
AVDD
Power for Analog Block
33
G
AGND
Ground for Analog Block
34
G
DGNDC
Ground for Internal Digital Block
35
P
DVDDC
Power for Internal Digital Block
36-40
B
C[7:3]
Video Chrominance Data[7:3]
* To the matter concerning package, Wafer business companies are unrelated contents.
Note) B: bi-direction pin, P: power pin, G: ground pin, O: output pin, I: Input pin
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