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參數(shù)資料
| 型號(hào)： | HV7131RP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Image Sensor with Image Signal Processing |
| 中文描述： | 的CMOS圖像傳感器和圖像信號(hào)處理 |
| 文件頁數(shù)： | 19/61頁 |
| 文件大?。?/td> | 2621K |
| 代理商： | HV7131RP |
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HV7131GP
2004/10/29 V2.4 19
Sensor Control B [SCTRB : 02h : 00h]
7
6
5
4
3
2
1
0
AE/AWB
Block
Sleep
Datapath
Block
Sleep
Analog
Block
Sleep
Sleep
Mode
Strobe
Enable
Clock Division
0
0
0
0
0
0
0
0
< Clock Acronym Definition >
MCF : Master Clock Frequency
DCF : Divided Clock Frequency
SCF : Sensor Clock Frequency
ICF : Image Processing Clock Frequency
VCF : Video Clock Frequency
LCF : Line Clock Frequency
< Clock Frequency Relation >
MCF : MCF
DCF : MCF/Clock Division
SCF : DCF/2
ICF
SCF for 3x3 interpolation,
SCF/2 for 1/4 subsampling mode
SCF/4 for 1/16 subsampling mode
VCF : ICF for 16bit output, ICF*2 for 8bit output
LCF : 1/(HBLANK Period + HSYNC Period)
AE/AWB Block Sleep
AE/AWB block goes into sleep mode with this bit set to high.
Datapath Block Sleep
Image processing datapath block goes into sleep mode with this bit set to
high.
Analog Block Sleep
all internal analog block goes into sleep mode with this bit set to high. With
All Digital Block Sleep active, sensor goes into power down mode.
Sleep Mode
all internal digital and analog block goes into sleep with this bit set to high.
Strobe Enable
When strobe signal is enabled by this bit, STROBE pin will indicates when
strobe light should be splashed in the dark environment to get adequate
lighted image.
Clock Division
divides input master clock(IMC) for internal use. Internal divided clock
frequency(DCF) is defined as master clock frequency(MCF) divided by
specified clock divisor. Internal divided clock frequency(DCF) is as follows.
000 : MCF, 001 : MCF/2, 010 : MCF/4, 011 : MCF/8
100 : MCF/16, 101 : MCF/32, 110 : MCF/64, 111 : MCF/128
Sensor Control C [SCTRC : 03h : 01h]
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