參數(shù)資料
型號(hào): HT47C10L
英文描述: 8-Bit R-F Type Low Voltage Mask MCU
中文描述: 8位低電壓RF型微控制器面具
文件頁(yè)數(shù): 18/38頁(yè)
文件大?。?/td> 287K
代理商: HT47C10L
HT47C10L
Rev. 1.10
18
October 2, 2002
Input/output ports
There is 8-bit bidirectional input/output port in the
microcontroller, labeled PA which is mapped to the data
memoryof[12H].AlloftheseI/Olinescanbeusedasin-
putandoutputoperations.Fortheinputoperation,these
lines are non-latching, that is, the inputs must be ready
at the T2 rising edge of instruction
(m=12H). For output operation, all the data is latched
andremainunchangeduntiltheoutputlatchisrewritten.
MOV A, [m]
Each I/O line has its own control register (PAC) to con-
trol the input/output configuration. With this control reg-
ister, CMOS output or Schmitt trigger input with pull-high
resistorstructurescanbereconfigureddynamically(i.e.,
on-the fly) under software control. To function as an in-
put,thecorrespondinglatchofthecontrolregisterhasto
be set as 1 . The pull-high resistor will be exhibited au-
tomatically. The input sources also depend on the con-
trol register. If the control register bit is 1 , the input will
read the pad state ( mov and readmodify-write instruc-
tions). If the control register bit is 0 , the contents of the
latches will move to internal data bus ( mov
read-modify-write instructions). The input paths (pad
state or latches) of read-modify-write instructions are
dependent on the control register bits. For output func-
tion, CMOS is the only configuration. This control regis-
ter is mapped to locations 13H.
and
After chip reset, these input/output lines stay at high lev-
els (pull-high). Each bit of these input/output latches can
be set or cleared by SET [m].i (m=12H) instructions.
Some instructions first input data and then follow the
output operations. For example,
SET [m].i ,
CPLA
[m] , read the entire port states into the CPU, execute the
defined operations (bit-operation), and then write the re-
sults back to the latches or to the accumulator.
Each bit of the port A has the capability of waking-up the
device.
The PA0 and PA1 are pin-shared with BZ and BZ, re-
spectively. If the BZ mode is selected, the output signal
in output mode of PA0 (or PA1) will be BZ (or BZ) signal.
The input mode always remains its original functions.
The 4kHz buzzer output signals (in output mode) are
controlled by the PA0 and PA1 data registers. The truth
table of PA0/BZ and PA1/BZ are listed below.
PA1
Data Register
PA0
Data Register
PA1, PA0
Pad Function
0 (CLR PA.1)
0 (CLR PA.0)
PA0=BZ, PA1=BZ
1 (SET PA.1)
0 (CLR PA.0)
PA0=BZ, PA1=0
X
1 (SET PA.0)
PA0=0, PA1=0
OPTION register: BZ mode enable
The PA2 and PA3 are pin-shared with EL1 and EL2 sig-
nals, respectively. If the EL mode is selected, the output
signal in output mode of PA2 (or PA3) will be the EL1 (or
EL2) signal. The input mode always remains its original
functions. The EL output signals (in output mode) are
controlled by the PA2 data register only. The truth table
of PA2/EL1 and PA3/EL2 are listed below.
PA3
Data Register
PA2
Data Register
PA3, PA2
Pad Function
0 or 1
0 (CLR PA.2)
PA2=EL1,PA3=EL2
0 or 1
1 (SET PA.2)
PA2=0, PA3=1
OPTION register: EL mode enable
5
$ + ,
$ <
"
#
%
( 1
B
(
(
I
6
I )
I
6
I )
4 ( )
( )
1
(
4 (
' (
(
4 (
1
(
(
( )
Note: BZ mode and EL mode functions are not shown in this diagram
相關(guān)PDF資料
PDF描述
HT47C10L(44QFP) Microcontroller
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