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參數(shù)資料
| 型號： | HSP50214BVC |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Programmable Downconverter |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP120 |
| 文件頁數(shù)： | 41/60頁 |
| 文件大小： | 573K |
| 代理商： | HSP50214BVC |
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3-41
Snap Shot Operation
The snapshot mode takes sets of adjacent samples at
programmed intervals. It is provided for tracking algorithms
that do not require processing of every sample, but do
require sets of adjacent samples. For example, bit sync
algorithms have narrow loop bandwidths that may not need
to be updated every sample. Computing the bit phase may
require 4 adjacent samples at 2 times the baud rate. The
snapshot mode allows the processor to implement the
tracking algorithms for high speed data without having to
handle every data sample.
The interval from the start of one snapshot to the start of a
second snapshot is programmed into bits 11-4 (where bit 11
is the MSB) of Control Word 21. The actual interval is the
value programmed plus 1. If bits 11-4 = 11111111, then the
interval is set to 256. If sample sets are to be taken every 4
samples, then bits 11-4 = 00000011.
Figure 43 shows the relationship between the snapshot
samples and the snapshot interval.
TIMING
|r|
φ
Q
DUAL
PORT
RAM
16
SEQUENCER
INCR
WR
“SEADDRESS
16
16
16
D
D
16
I
RD
INCR
WRITE
SEQUENCER
|r|
φ
Q
I
STATUS
0
1
2
3
4
NEW
DATA
M
FIGURE 41. 8-BIT MICROPROCESSOR INTERFACE BUFFER RAM MODE BLOCK DIAGRAM
OUTPUT
DATA
0
1
0
1
0
1
0
1
WRITE
ADDRESS “5”
CONTROL
WORD 23
R0
R1
R2
A0
A1
R0 A1
LSByte
MSByte
2
3
INT(15:0)
INT(22:16)
AGC
A(2:0)
RD
R2, R1, R0
0: I;Q (2’s COMP)
1: |r|;
φ
(O; UNSIGNED BINARY; 2’s COMP)
2:
(2’s COMPLEMENT)
4: INPUT AGC (O; UNSIGNED BINARY)
5: AGC; TIMING (O; UNSIGNED BINARY;
2’s COMP)
M
M
M
M
M
A2, A1, A0
A1
A2
A0
R2 R1 R0 A2 A1 A0 SELECTION
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
0
0
1
0
1
0
0
1
0
1
0
1
0
0
0
0
1
0
0
0
0
1
1
X
X
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
1
0
1
0
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
1
X
X
X
X
X
X
1
1
0 RAM I LSB
1 RAM I MSB
0 RAM Q LSB
1 RAM Q MSB
0 RAM |r| LSB
1 RAM |r| MSB
0 RAM
φ
LSB
1 RAM
φ
MSB
0 RAM
LSB
1 RAM
MSB
X NOT USED
0 INPUT INTEG LSB
1 INPUT INTEG NMSB
0 INPUT INTEG MSB
0 AGC LSB
1 AGC MSB
0 TIMING LSB
1 TIMING MSB
X NOT USED
1 STATUS
FIGURE 42. RAM LOAD SEQUENCE
PROCCLK
DATARDY
(I/Q SELECTED)
DATARDY
(R/
φ
SELECTED)
INTRRP
WRITES TO
SNAPSHOT
RAM
I/Q
R/
φ
I
Q
R
φ
DELAY TO DATARDY DEPENDS ON LENGTH OF FIR IF FREQ CHOSEN
FIGURE 43. SNAP SHOT SAMPLING
0
1
2
3
4
63
62
64
65
INTERVAL = 64
# SAMPLES = 4
ADJACENT
SAMPLES
HSP50214B
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50214BVCZ | 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214BVI | 功能描述:上下轉(zhuǎn)換器 120L MQFP INDTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214BVIZ | 功能描述:上下轉(zhuǎn)換器 120L MQFP INDTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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