參數(shù)資料
型號(hào)： HSP50016JC-52
廠商： INTERSIL CORP
元件分類： 數(shù)字信號(hào)處理外設(shè)
英文描述： Digital Down Converter
中文描述： 16-BIT, DSP-MIXER, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 17/31頁(yè)
文件大小： 209K
代理商： HSP50016JC-52
3-214
TABLE 7. PHASE GENERATION/HDF.OUTPUT REGISTER
DESTINATION ADDRESS = 4
BIT
POSITION
FUNCTION
DESCRIPTION
39-37
Address
100 = Control Word 4
36
Update
0 = Update Only This Control Register
1 = Update All Control Registers
35-33
Reserved
All Zeroes
32-31
Output
Spectrum
00 = No Up Conversion,Complex Output
01 = Up Convert by f”/4, Real Output
10 = Up Convert by f”/2,Complex Output
11 = Reserved Mode
30-7
Delta Phase Increment
24-Bit Delta Phase Increment. Bits 30-7 = 2
23
... 2
0
.
Range: 0 < Delta Phase Increment <
π
(2
-8
-2
-32
)
6-1
HDF Data Shift
(Shift Factor)
16-Bit HDF Gain Compensation Number - the shift portion.
HDF Input Data Shift (Towards LSB). Bits 6-1 = 2
5
...2
0
.
Range: 0
≤
Shift Factor
≤
55 decimal; Range: [0
≤
Shift Factor
≤
37]hex
Calculate the value for this field using this equation:
HDF Data Shift = [75 - Ceiing(5 log
2
(R))]hex
Note: log
2
(x) = (3.32)log(x)
0
Spectral Reverse
0 = Normal Output
1 = Spectrally Reversed Output
TABLE 8. HDF/OUTPUT REGISTER
DESTINATION ADDRESS = 5
BIT
POSITION
FUNCTION
DESCRIPTION
39-37
Address
101 = Control Word 5
36
Update
0 = Update Only This Control Register
1 = Update All Control Registers
35-21
HDF Decimation
Counter Preload
(HDF DCP)
HDF Decimation Counter Preload. Range: 15 < HDF Decimation Counter Preload < 32,767
Calculate the value for this feild using this equation:
HDF DCP = R - 1;
where R is the HDF decimation (rate change) factor.
Common HDF decimation (rate change) factors and associated hexidecimal HDF DCP values:
000f
: R = 16
00ff
: R = 128
01ff
: R = 512
03ff
: R = 1,024
07ff
: R = 2,048
0fff
: R = 4,096
1fff
: R = 8,192
3fff
: R = 16,384
7fff
: R = 32,768
HSP50016
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