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參數(shù)資料
| 型號： | HN58S65AI |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 8192-word ×8-bit Electrically Erasable and Programmable CMOS ROM(8k字×8位 EEPROM) |
| 中文描述： | 8192字× 8位電可擦除和可編程的CMOS光盤（8K的字× 8位的EEPROM） |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 134K |
| 代理商： | HN58S65AI |
Datasheet Title
6
Write Cycle
Parameter
Symbol
Min*
2
Typ
Max
Unit
Test
conditions
Address setup time
t
AS
t
AH
t
CS
t
CH
t
WS
t
WH
t
OES
t
OEH
t
DS
t
DH
t
WP
t
CW
t
DL
t
BLC
t
BL
t
WC
t
DB
t
DW
0
—
—
ns
Address hold time
CE
to write setup time (
WE
controlled)
CE
hold time (
WE
controlled)
WE
to write setup time (
CE
controlled)
WE
hold time (
CE
controlled)
OE
to write setup time
OE
hold time
150
—
—
ns
0
—
—
ns
0
—
—
ns
0
—
—
ns
0
—
—
ns
0
—
—
ns
0
—
—
ns
Data setup time
150
—
—
ns
Data hold time
WE
pulse width (
WE
controlled)
CE
pulse width (
CE
controlled)
0
—
—
ns
200
—
—
ns
200
—
—
ns
Data latch time
200
—
—
ns
Byte load cycle
0.4
—
30
μ
s
μ
s
Byte load window
100
—
—
Write cycle time
—
—
15*
3
ms
Time to device busy
120
—
—
ns
Write start time
Notes: 1. t
is defined as the time at which the outputs achieve the open circuit conditions and
are no longer driven.
2. Use this device in longer cycle than this value.
3. t
must be longer than this value unless polling techniques or RDY/
Busy
are used. This device
automatically completes the internal write operation within this value.
4. Next read or write operation can be initiated after t
DW
if polling techniques or RDY/
Busy
are used.
5. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
WE
.
6. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
CE
.
7. See AC read characteristics.
0*
4
—
—
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HN58S65AT-15 | 64 k EEPROM (8-kword x 8-bit) Ready/Busy function |
| HN58S65A | 64 k EEPROM (8-kword ×8-bit)(64 k EEPROM (8k字 ×8位)) |
| HN58V1001P-25 | 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
| HN58V1001FP-25 | 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
| HN58V1001T-25 | 5015 RR 3#8 SKT RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN58S65AISERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58S65ASERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HN58S65AT-15 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:64 k EEPROM (8-kword x 8-bit) Ready/Busy function |
| HN58S65ATI-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58V1001 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:1M EEPROM (128-kword × 8-bit) Ready/Busy and RES function |
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