參數(shù)資料
型號: HM5165805FLJ-5
元件分類: DRAM
英文描述: 8M X 8 EDO DRAM, 50 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, SOJ-32
文件頁數(shù): 3/35頁
文件大小: 477K
代理商: HM5165805FLJ-5
HM5164805F Series, HM5165805F Series
11
AC Characteristics (Ta = 0 to +70C, V
CC = 3.3 V ± 0.3 V, VSS = 0 V) *
1, *2, *19
Test Conditions
Input rise and fall time: 2 ns
Input pulse levels: V
IL = 0 V, VIH = 3.0 V
Input timing reference levels: 0.8 V, 2.0 V
Output timing reference levels: 0.8 V, 2.0 V
Output load: 1 TTL gate + C
L (100 pF) (Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles (Common parameters)
HM5164805F/HM5165805F
-5
-6
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Random read or write cycle time
t
RC
84
104
ns
RAS precharge time
t
RP
30
40
ns
CAS precharge time
t
CP
8
10
ns
RAS pulse width
t
RAS
50
10000
60
10000
ns
CAS pulse width
t
CAS
8
10000
10
10000
ns
Row address setup time
t
ASR
0—
ns
Row address hold time
t
RAH
8
10
ns
Column address setup time
t
ASC
0—
ns
Column address hold time
t
CAH
8
10
ns
RAS to CAS delay time
t
RCD
12
37
14
45
ns
3
RAS to column address delay time
t
RAD
10
25
12
30
ns
4
RAS hold time
t
RSH
13
15
ns
CAS hold time
t
CSH
38
40
ns
CAS to RAS precharge time
t
CRP
5—
ns
OE to Din delay time
t
OED
13
15
ns
5
OE delay time from Din
t
DZO
0—
ns
6
CAS delay time from Din
t
DZC
0—
ns
6
Transition time (rise and fall)
t
T
2
50
2
50
ns
7
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