參數(shù)資料
型號(hào): HD74LV2GT125AUSE
廠商: Renesas Technology Corp.
英文描述: Dual Bus Buffer with 3?state Output / CMOS Logic Level Shifter
中文描述: 雙總線緩沖器3?國(guó)家輸出/ CMOS邏輯電平轉(zhuǎn)換器
文件頁(yè)數(shù): 7/9頁(yè)
文件大小: 92K
代理商: HD74LV2GT125AUSE
HD74LV2GT125A
Rev.2.00, Oct.23.2003, page 7 of 8
t
PLH
t
PHL
V
OH
V
OL
GND
V
I
Vref
50%
Vref
Vref
50%
50%
50%
Vref
Input A
Output Y
Waveforms – 1
Waveforms – 2
10 %
90 %
tr
tf
10 %
90 %
V – 0.3 V
V + 0.3 V
t
ZL
t
LZ
t
ZH
t
HZ
V
OH
V
OL
Waveform – A
Input
OE
Waveform – B
GND
GND
V
I
V
CC
tr
tf
10 %
10 %
90 %
90 %
Notes: 1. Input waveform : PRR
1 MHz, Zo = 50
.
2. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
V
CC
(V)
Vref
t
r
/ t
f
3.3±0.3
2.5 V
V
I
INPUTS
50%
1.5 V
3 V
5.0±0.5
3.0 ns
3.0 ns
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