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參數(shù)資料
| 型號： | HD74LV2GT125AUSE |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | Dual Bus Buffer with 3?state Output / CMOS Logic Level Shifter |
| 中文描述： | 雙總線緩沖器3？國家輸出/ CMOS邏輯電平轉(zhuǎn)換器 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大小： | 92K |
| 代理商： | HD74LV2GT125AUSE |
HD74LV2GT125A
Rev.2.00, Oct.23.2003, page 5 of 8
Switching Characteristics
V
CC
= 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
—
4.5
9.0
1.0
10.5
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
Propagation
delay time
t
PLH
t
PHL
—
6.0
11.5
1.0
13.0
ns
A
Y
—
4.5
9.0
1.0
10.5
Enable time
t
ZH
t
ZL
—
6.0
11.5
1.0
13.0
ns
OE
Y
—
4.0
10.0
1.0
11.5
Disable time
t
HZ
t
LZ
—
5.5
13.5
1.0
15.0
ns
OE
Y
V
CC
= 5.0 ± 0.5 V
T
a
= 25°C
T
a
= –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
—
3.4
5.5
1.0
6.5
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
Propagation
delay time
t
PLH
t
PHL
—
4.3
7.5
1.0
8.5
ns
A
Y
—
3.4
5.1
1.0
6.0
Enable time
t
ZH
t
ZL
—
4.4
7.1
1.0
8.0
ns
OE
Y
—
3.2
6.8
1.0
8.0
Disable time
t
HZ
t
LZ
—
4.0
8.8
1.0
10.0
ns
OE
Y
Operating Characteristics
C
L
= 50 pF
T
a
= 25°C
Item
Symbol
V
CC
(V) Min
Typ
Max
Unit
Test Conditions
Power dissipation
capacitance
C
PD
5.0
—
11.5
—
pF
f = 10 MHz
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| HD74LV2GT245A | Dual Bus Transceivers with 3?state Outputs / CMOS Logic Level Shifter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74LV2GT125AUSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV2GT,Dual Bus Buffer,SSOP8 |
| HD74LV2GT126AUSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV2GT,Dual Bus Buffer,SSOP8 |
| HD74LV2GT14AUSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV2GT,Triple Inverters,SSOP8 |
| HD74LV2GT241AUSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV2GT,2ch Bus Buffer Non-Inveted |
| HD74LV2GT245AUSE-E | 制造商:Renesas Electronics Corporation 功能描述:Logic,74LV2GT,2ch Bus Tranceivers,SSOP8 |
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