參數(shù)資料
型號: HD74AC
廠商: Hitachi,Ltd.
英文描述: HD74AC Series Common Information
中文描述: HD74AC系列通用信息
文件頁數(shù): 42/52頁
文件大?。?/td> 220K
代理商: HD74AC
Design Considerations
41
Gnd
V
CC
70%
0
0
5 10 15 20 25
Pulse Width (ns)
30 35 40 45 50
1
2
3Volts
V
CC
= 5.0 V
HAZARD
SAFE
Figure 14 Low Noise Margin
With over 2.0 V of noise margins, the FACT family offers better noise rejection than any other comparable
technology.
In any design, the distance that lines run adjacent to each other should be kept as short as possible. The
best situation is when the lines are perpendicular to each other. For those situations where lines must run
parallel, the effects of crosstalk can be minimized by line termination. Terminating a line in its
characteristic impedance reduces the amplitude of an initial crosstalk pulse by 50%. Terminating the line
will also reduce the amount of ringing (figure 15). Crosstalk problems can also be reduced by moving lines
further apart or by inserting ground lines or planes between them.
Signal on Active Line
Passive Line
Noise Amplitude at A
Versus R
Vn = Coupled Signal
Z
O
A
R
V
T
100% : N
O
R
67% : R = 2Z
O
60% : R = 1.5Z
O
50% : R = Z
O
R+Z
O
R
V
Figure 15 Effects of Termination on Crosstalk
相關(guān)PDF資料
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HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器)
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HD74ALVC162834A 1-Of-8 Data Selectors/Multiplexers 16-CDIP -55 to 125
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