631
SCR—Serial Control Register
H'8A
SCI1
Bit
Initial value
Read/Write
7
TIE
0
R/W
6
RIE
0
R/W
5
TE
0
R/W
4
RE
0
R/W
3
MPIE
0
R/W
0
CKE0
0
R/W
2
TEIE
0
R/W
1
CKE1
0
R/W
Clock Enable 0
0
1
SCK pin uesd for serial clock output.
SCK pin not used
Clock Enable 1
0
1
External clock
Internal clock
Transmit End Interrupt Enable
0
1
TSR-empty interrupt request is enabled.
TSR-empty interrupt request is disabled.
Multiprocessor Interrupt Enable
0
1
Multiprocessor receive interrupt function is enabled.
Multiprocessor receive interrupt function is disabled.
Receive Enable
0
1
Receive enabled
Receive disabled
Transmit Enable
0
1
Transmit enabled
Transmit disabled
Receive Interrupt Enable
0
1
Receive end interrupt and receive error requests are enabled.
Receive end interrupt and receive error requests are disabled.
Transmit Interrupt Enable
0
1
TDR-empty interrupt request is enabled.
TDR-empty interrupt request is disabled.