75
Table 4.2
Interrupts
Interrupt source
No.
Vector Table Address
Priority
NMI
IRQ
0
IRQ
1
IRQ
2
IRQ
3
IRQ
4
IRQ
5
IRQ
6
IRQ
7
16-bit free-running
timer
3
4
5
6
7
8
9
10
11
H'0006 to H'0007
H'0008 to H'0009
H'000A to H'000B
H'000C to H'000D
H'000E to H'000F
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
High
ICIA (Input capture A)
ICIB (Input capture B)
ICIC (Input capture C)
ICID (Input capture D)
OCIA (Output compare A)
OCIB (Output compare B)
FOVI (Overflow)
12
13
14
15
16
17
18
H'0018 to H'0019
H'001A to H'001B
H'001C to H'001D
H'001E to H'001F
H'0020 to H'0021
H'0022 to H'0023
H'0024 to H'0025
8-bit timer 0
CMI0A (Compare-match A)
CMI0B (Compare-match B)
OVI0 (Overflow)
19
20
21
H'0026 to H'0027
H'0028 to H'0029
H'002A to H'002B
8-bit timer 1
CMI1A (Compare-match A)
CMI1B (Compare-match B)
OVI1 (Overflow)
22
23
24
H'002C to H'002D
H'002E to H'002F
H'0030 to H'0031
Host interface
*
1
IBF1 (IDR1 receive end)
IBF2 (IDR2 receive end)
25
26
H'0032 to H'0033
H'0034 to H'0035
Serial
communication
interface 0
ERI0 (Receive error)
RXI0 (Receive end)
TXI0 (TDR empty)
TEI0 (TSR empty)
27
28
29
30
H'0036 to H'0037
H'0038 to H'0039
H'003A to H'003B
H'003C to H'003D
Serial
communication
interface 1
ERI1 (Receive error)
RXI1 (Receive end)
TXI1 (TDR empty)
TEI1 (TSR empty)
31
32
33
34
H'003E to H'003F
H'0040 to H'0041
H'0042 to H'0043
H'0044 to H'0045
A/D converter
ADI (Conversion end)
35
H'0046 to H'0047
Watchdog timer
WOVF (WDT overflow)
36
H'0048 to H'0049
I
2
C bus interface
*
2
Notes: 1. H'0000 and H'0001 contain the reset vector.
2. H'0002 to H'0005 are reserved in the H8/3337 Series and H8/3397 Series are not
available to the user.
*
1 H8/3337 Series only.
*
2 H8/3337 Series only (option).
IICI (Transfer end)
37
H'004A to H'004B
Low