參數(shù)資料
型號(hào): HD49235FS
廠商: Hitachi,Ltd.
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: Digital Signal Processor for CD
中文描述: 數(shù)字信號(hào)處理器的CD
文件頁(yè)數(shù): 33/41頁(yè)
文件大?。?/td> 192K
代理商: HD49235FS
HD49235FS
Rev.2, Aug. 1995, page 33 of 41
Four frames
0%
100%
π
+
π
0
Figure 20 Duty Cycle Characteristic of MSTOP Output for Constant Linear Velocity Control
Microprocessor
command
Selecting register E
XLT
SENS
Interval between EFM edges
32 T
Figure 21 SENS Output in Brake Mode
Digital Audio Interface
BIDAT:
Digital audio interface output pin. The output can be switched on or off by microprocessor
command DOOFF (in register 8).
Interpolation
A microprocessor command SLTSW (register 8) can select the 48-fs or 64-fs clock. Figures 22 and 23
show the output timing. With the 48-fs clock, a microprocessor command SUBCO (register 8) can select
whether or not to insert subcode data in the DAS output. Figures 24 and 25 show the output timing.
DAS:
This pin outputs audio or ROM data. The ROM microprocessor command (in register 8) can select
whether or not to carry out interpolation. Preceding-value and mean-value interpolation are carried out.
With a 48-fs clock, the data is output MSB first and squeezed to the rear. With a 64-fs clock, the data is
output LSB first and squeezed to the rear.
CKX:
This pin outputs the data transfer clock.
MPX:
This pin outputs a signal that distinguishes between the left and right channels. With a 64-fs clock,
low output indicates the left channel and high output indicates the right channel. With a
48-fs clock, this polarity is reversed.
QMX:
This pin outputs a clock signal with four times the frequency of MPX.
DMX:
This pin outputs a clock signal with two times the frequency of MPX.
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